From: Douglas Anderson <dianders@chromium.org>
To: dri-devel@lists.freedesktop.org
Cc: devicetree@vger.kernel.org, steev@kali.org,
robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com,
bjorn.andersson@linaro.org, daniel@ffwll.ch, airlied@linux.ie,
jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com,
rodrigo.vivi@intel.com, sam@ravnborg.org, jonas@kwiboo.se,
mripard@kernel.org, thierry.reding@gmail.com, lyude@redhat.com,
linus.walleij@linaro.org, rajeevny@codeaurora.org,
linux-arm-msm@vger.kernel.org, a.hajda@samsung.com,
tzimmermann@suse.de, narmstrong@baylibre.com,
Douglas Anderson <dianders@chromium.org>,
Sean Paul <seanpaul@chromium.org>,
Sandeep Panda <spanda@codeaurora.org>,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 3/6] drm/bridge: ti-sn65dsi86: Add some 100 us delays
Date: Fri, 30 Jul 2021 08:46:02 -0700 [thread overview]
Message-ID: <20210730084534.v2.3.I842d483139531aa4651da8338512fdf0171ff23c@changeid> (raw)
In-Reply-To: <20210730154605.2843418-1-dianders@chromium.org>
The manual has always said that we need 100 us delays in a few
places. Though it hasn't seemed to be a big deal to skip these, let's
add them in case it makes something happier.
NOTE: this fixes no known issues but it seems good to make it right.
Fixes: a095f15c00e2 ("drm/bridge: add support for sn65dsi86 bridge driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
---
Changes in v2:
- Added Fixes tag as requested by Sam.
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index 5e932070a1c3..cd0fccdd8dfd 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -307,6 +307,9 @@ static int __maybe_unused ti_sn65dsi86_resume(struct device *dev)
return ret;
}
+ /* td2: min 100 us after regulators before enabling the GPIO */
+ usleep_range(100, 110);
+
gpiod_set_value(pdata->enable_gpio, 1);
/*
@@ -1096,6 +1099,9 @@ static void ti_sn_bridge_pre_enable(struct drm_bridge *bridge)
if (!pdata->refclk)
ti_sn65dsi86_enable_comms(pdata);
+
+ /* td7: min 100 us after enable before DSI data */
+ usleep_range(100, 110);
}
static void ti_sn_bridge_post_disable(struct drm_bridge *bridge)
--
2.32.0.554.ge1b32706d8-goog
next prev parent reply other threads:[~2021-07-30 15:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-30 15:45 [PATCH v2 0/6] drm/panel: atna33xc20: Fix the Samsung ATNA33XC20 panel Douglas Anderson
2021-07-30 15:46 ` [PATCH v2 1/6] drm/dp: Don't zero PWMGEN_BIT_COUNT when driver_pwm_freq_hz not specified Douglas Anderson
2021-07-30 15:46 ` [PATCH v2 2/6] drm/bridge: ti-sn65dsi86: Fix power off sequence Douglas Anderson
2021-07-30 15:46 ` Douglas Anderson [this message]
2021-07-30 15:46 ` [PATCH v2 4/6] Revert "drm/panel-simple: Add Samsung ATNA33XC20" Douglas Anderson
2021-07-30 15:46 ` [PATCH v2 5/6] Revert "drm/panel-simple: Support for delays between GPIO & regulator" Douglas Anderson
2021-07-30 15:46 ` [PATCH v2 6/6] drm/panel: atna33xc20: Introduce the Samsung ATNA33XC20 panel Douglas Anderson
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