From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E11CFC4338F for ; Mon, 2 Aug 2021 11:22:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C404661029 for ; Mon, 2 Aug 2021 11:22:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233445AbhHBLWt (ORCPT ); Mon, 2 Aug 2021 07:22:49 -0400 Received: from mail.kernel.org ([198.145.29.99]:59052 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233243AbhHBLWt (ORCPT ); Mon, 2 Aug 2021 07:22:49 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id E646C60F36; Mon, 2 Aug 2021 11:22:37 +0000 (UTC) Date: Mon, 2 Aug 2021 12:22:35 +0100 From: Catalin Marinas To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, anshuman.khandual@arm.com, will@kernel.org, james.morse@arm.com, mathieu.poirier@linaro.org, mike.leach@linaro.org, leo.yan@linaro.org, maz@kernel.org, mark.rutland@arm.com Subject: Re: [PATCH 07/10] arm64: Add erratum detection for TRBE overwrite in FILL mode Message-ID: <20210802112235.GC18685@arm.com> References: <20210728135217.591173-1-suzuki.poulose@arm.com> <20210728135217.591173-8-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210728135217.591173-8-suzuki.poulose@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 28, 2021 at 02:52:14PM +0100, Suzuki K Poulose wrote: > Arm Neoverse-N2 and the Cortex-A710 cores are affected > by a CPU erratum where the TRBE will overwrite the trace buffer > in FILL mode. The TRBE doesn't stop (as expected in FILL mode) > when it reaches the limit and wraps to the base to continue > writing upto 3 cache lines. This will overwrite any trace that > was written previously. > > Add the Neoverse-N2 erratumi(#2139208) and Cortex-A710 erratum > (#2119858) to the detection logic. > > This will be used by the TRBE driver in later patches to work > around the issue. The detection has been kept with the core > arm64 errata framework list to make sure : > - We don't duplicate the framework in TRBE driver > - The errata detection is advertised like the rest > of the CPU errata. > > Note that the Kconfig entries will be added after we have added > the work around in the TRBE driver, which depends on the cpucap > from here. > > Cc: Will Deacon > Cc: Mark Rutland > Cc: Anshuman Khandual > Cc: Catalin Marinas > Cc: Mathieu Poirier > Cc: Mike Leach > cc: Leo Yan > Signed-off-by: Suzuki K Poulose Acked-by: Catalin Marinas