linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Mark Brown]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_device_info.c

between commit:

  0f9ed3b2c9ec ("drm/i915/display/cnl+: Handle fused off DSC")

from the drm-intel-fixes tree and commit:

  a4d082fc194a ("drm/i915: rename/remove CNL registers")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

diff --cc drivers/gpu/drm/i915/intel_device_info.c
index e0a10f36acc1,305facedd284..000000000000
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[broonie]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/display/intel_snps_phy.c

between commit:

  28adef861233c ("drm/i915/dg2: Print PHY name properly on calibration error")

from the drm-intel-fixes tree and commits:

  84073e568eec7 ("drm/i915/dg2: Print PHY name properly on calibration error")
  b4eb76d82a0ea ("drm/i915/dg2: Skip output init on PHY calibration failure")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

[Used drm-intel version]

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[broonie]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/display/intel_bw.c

between commit:

  ec663bca9128f ("drm/i915: Fix bw atomic check when switching between SAGV vs. no SAGV")

from the drm-intel-fixes tree and commit:

  6d8ebef53c2cc ("drm/i915: Extract intel_bw_check_data_rate()")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

(took the drm-intel version)

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/i915_reg.h

between commit:

  b3f74938d656 ("drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for reference")

from the drm-intel-fixes tree and commit:

  22ba60f617bd ("drm/i915: Move [more] GT registers to their own header file")

from the drm-intel tree.

I fixed it up (I just used the latter version) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging.  You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.

-- 
Cheers,
Stephen Rothwell

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Re: linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

On Tue, 30 Jun 2020 11:52:02 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Today's linux-next merge of the drm-intel tree got a conflict in:
> 
>   drivers/gpu/drm/i915/gvt/handlers.c
> 
> between commit:
> 
>   fc1e3aa0337c ("drm/i915/gvt: Fix incorrect check of enabled bits in mask registers")
> 
> from the drm-intel-fixes tree and commit:
> 
>   5f4ae2704d59 ("drm/i915: Identify Cometlake platform")
> 
> from the drm-intel tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> diff --cc drivers/gpu/drm/i915/gvt/handlers.c
> index fadd2adb8030,26cae4846c82..000000000000
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@@ -1731,8 -1734,9 +1734,9 @@@ static int ring_mode_mmio_write(struct 
>   		return 0;
>   	}
>   
> - 	if (IS_COFFEELAKE(vgpu->gvt->gt->i915) &&
> + 	if ((IS_COFFEELAKE(vgpu->gvt->gt->i915) ||
> + 	     IS_COMETLAKE(vgpu->gvt->gt->i915)) &&
>  -	    data & _MASKED_BIT_ENABLE(2)) {
>  +	    IS_MASKED_BITS_ENABLED(data, 2)) {
>   		enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST);
>   		return 0;
>   	}

This is now a conflict between the drm tree and Linus' tree.

-- 
Cheers,
Stephen Rothwell

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/gvt/handlers.c

between commit:

  fc1e3aa0337c ("drm/i915/gvt: Fix incorrect check of enabled bits in mask registers")

from the drm-intel-fixes tree and commit:

  5f4ae2704d59 ("drm/i915: Identify Cometlake platform")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/i915/gvt/handlers.c
index fadd2adb8030,26cae4846c82..000000000000
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@@ -1731,8 -1734,9 +1734,9 @@@ static int ring_mode_mmio_write(struct 
  		return 0;
  	}
  
- 	if (IS_COFFEELAKE(vgpu->gvt->gt->i915) &&
+ 	if ((IS_COFFEELAKE(vgpu->gvt->gt->i915) ||
+ 	     IS_COMETLAKE(vgpu->gvt->gt->i915)) &&
 -	    data & _MASKED_BIT_ENABLE(2)) {
 +	    IS_MASKED_BITS_ENABLED(data, 2)) {
  		enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST);
  		return 0;
  	}

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Re: linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

On Wed, 11 Mar 2020 13:36:35 +1100 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Today's linux-next merge of the drm-intel tree got a conflict in:
> 
>   drivers/gpu/drm/i915/gvt/vgpu.c
> 
> between commit:
> 
>   04d6067f1f19 ("drm/i915/gvt: Fix unnecessary schedule timer when no vGPU exits")
> 
> from the drm-intel-fixes tree and commit:
> 
>   12d5861973c7 ("drm/i915/gvt: Make WARN* drm specific where vgpu ptr is available")
> 
> from the drm-intel tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> -- 
> Cheers,
> Stephen Rothwell
> 
> diff --cc drivers/gpu/drm/i915/gvt/vgpu.c
> index 345c2aa3b491,abcde8ce1a9a..000000000000
> --- a/drivers/gpu/drm/i915/gvt/vgpu.c
> +++ b/drivers/gpu/drm/i915/gvt/vgpu.c
> @@@ -271,18 -272,12 +272,19 @@@ void intel_gvt_release_vgpu(struct inte
>   void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
> + 	struct drm_i915_private *i915 = gvt->gt->i915;
>   
> - 	WARN(vgpu->active, "vGPU is still active!\n");
>  -	mutex_lock(&vgpu->vgpu_lock);
>  -
> + 	drm_WARN(&i915->drm, vgpu->active, "vGPU is still active!\n");
>   
>  +	/*
>  +	 * remove idr first so later clean can judge if need to stop
>  +	 * service if no active vgpu.
>  +	 */
>  +	mutex_lock(&gvt->lock);
>  +	idr_remove(&gvt->vgpu_idr, vgpu->id);
>  +	mutex_unlock(&gvt->lock);
>  +
>  +	mutex_lock(&vgpu->vgpu_lock);
>   	intel_gvt_debugfs_remove_vgpu(vgpu);
>   	intel_vgpu_clean_sched_policy(vgpu);
>   	intel_vgpu_clean_submission(vgpu);

This is now a conflict between the drm tree and Linus' tree.

-- 
Cheers,
Stephen Rothwell

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/gvt/vgpu.c

between commit:

  04d6067f1f19 ("drm/i915/gvt: Fix unnecessary schedule timer when no vGPU exits")

from the drm-intel-fixes tree and commit:

  12d5861973c7 ("drm/i915/gvt: Make WARN* drm specific where vgpu ptr is available")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/i915/gvt/vgpu.c
index 345c2aa3b491,abcde8ce1a9a..000000000000
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@@ -271,18 -272,12 +272,19 @@@ void intel_gvt_release_vgpu(struct inte
  void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
  {
  	struct intel_gvt *gvt = vgpu->gvt;
+ 	struct drm_i915_private *i915 = gvt->gt->i915;
  
- 	WARN(vgpu->active, "vGPU is still active!\n");
 -	mutex_lock(&vgpu->vgpu_lock);
 -
+ 	drm_WARN(&i915->drm, vgpu->active, "vGPU is still active!\n");
  
 +	/*
 +	 * remove idr first so later clean can judge if need to stop
 +	 * service if no active vgpu.
 +	 */
 +	mutex_lock(&gvt->lock);
 +	idr_remove(&gvt->vgpu_idr, vgpu->id);
 +	mutex_unlock(&gvt->lock);
 +
 +	mutex_lock(&vgpu->vgpu_lock);
  	intel_gvt_debugfs_remove_vgpu(vgpu);
  	intel_vgpu_clean_sched_policy(vgpu);
  	intel_vgpu_clean_submission(vgpu);

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Re: linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

This is now a conflict between the drm tree and Linus' tree.

On Fri, 22 Mar 2019 10:57:28 +1100 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Today's linux-next merge of the drm-intel tree got a conflict in:
> 
>   drivers/gpu/drm/i915/gvt/mmio_context.c
> 
> between commit:
> 
>   1e8b15a1988e ("drm/i915/gvt: Add in context mmio 0x20D8 to gen9 mmio list")
> 
> from the drm-intel-fixes tree and commit:
> 
>   8a68d464366e ("drm/i915: Store the BIT(engine->id) as the engine's mask")
> 
> from the drm-intel tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> diff --cc drivers/gpu/drm/i915/gvt/mmio_context.c
> index 7902fb162d09,a00a807a1d55..000000000000
> --- a/drivers/gpu/drm/i915/gvt/mmio_context.c
> +++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
> @@@ -73,71 -73,70 +73,71 @@@ static struct engine_mmio gen8_engine_m
>   };
>   
>   static struct engine_mmio gen9_engine_mmio_list[] __cacheline_aligned = {
> - 	{RCS, GFX_MODE_GEN7, 0xffff, false}, /* 0x229c */
> - 	{RCS, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
> - 	{RCS, HWSTAM, 0x0, false}, /* 0x2098 */
> - 	{RCS, INSTPM, 0xffff, true}, /* 0x20c0 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 5), 0, false}, /* 0x24e4 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 6), 0, false}, /* 0x24e8 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 7), 0, false}, /* 0x24ec */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 8), 0, false}, /* 0x24f0 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 9), 0, false}, /* 0x24f4 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 10), 0, false}, /* 0x24f8 */
> - 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 11), 0, false}, /* 0x24fc */
> - 	{RCS, CACHE_MODE_1, 0xffff, true}, /* 0x7004 */
> - 	{RCS, GEN7_GT_MODE, 0xffff, true}, /* 0x7008 */
> - 	{RCS, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */
> - 	{RCS, GEN7_COMMON_SLICE_CHICKEN1, 0xffff, true}, /* 0x7010 */
> - 	{RCS, HDC_CHICKEN0, 0xffff, true}, /* 0x7300 */
> - 	{RCS, VF_GUARDBAND, 0xffff, true}, /* 0x83a4 */
> - 
> - 	{RCS, GEN8_PRIVATE_PAT_LO, 0, false}, /* 0x40e0 */
> - 	{RCS, GEN8_PRIVATE_PAT_HI, 0, false}, /* 0x40e4 */
> - 	{RCS, GEN8_CS_CHICKEN1, 0xffff, true}, /* 0x2580 */
> - 	{RCS, COMMON_SLICE_CHICKEN2, 0xffff, true}, /* 0x7014 */
> - 	{RCS, GEN9_CS_DEBUG_MODE1, 0xffff, false}, /* 0x20ec */
> - 	{RCS, GEN8_L3SQCREG4, 0, false}, /* 0xb118 */
> - 	{RCS, GEN7_HALF_SLICE_CHICKEN1, 0xffff, true}, /* 0xe100 */
> - 	{RCS, HALF_SLICE_CHICKEN2, 0xffff, true}, /* 0xe180 */
> - 	{RCS, HALF_SLICE_CHICKEN3, 0xffff, true}, /* 0xe184 */
> - 	{RCS, GEN9_HALF_SLICE_CHICKEN5, 0xffff, true}, /* 0xe188 */
> - 	{RCS, GEN9_HALF_SLICE_CHICKEN7, 0xffff, true}, /* 0xe194 */
> - 	{RCS, GEN8_ROW_CHICKEN, 0xffff, true}, /* 0xe4f0 */
> - 	{RCS, TRVATTL3PTRDW(0), 0, false}, /* 0x4de0 */
> - 	{RCS, TRVATTL3PTRDW(1), 0, false}, /* 0x4de4 */
> - 	{RCS, TRNULLDETCT, 0, false}, /* 0x4de8 */
> - 	{RCS, TRINVTILEDETCT, 0, false}, /* 0x4dec */
> - 	{RCS, TRVADR, 0, false}, /* 0x4df0 */
> - 	{RCS, TRTTE, 0, false}, /* 0x4df4 */
> - 
> - 	{BCS, RING_GFX_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2229c */
> - 	{BCS, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
> - 	{BCS, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
> - 	{BCS, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
> - 	{BCS, RING_EXCC(BLT_RING_BASE), 0x0, false}, /* 0x22028 */
> - 
> - 	{VCS2, RING_EXCC(GEN8_BSD2_RING_BASE), 0xffff, false}, /* 0x1c028 */
> - 
> - 	{VECS, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */
> - 
> - 	{RCS, GEN8_HDC_CHICKEN1, 0xffff, true}, /* 0x7304 */
> - 	{RCS, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
> - 	{RCS, GEN7_UCGCTL4, 0x0, false}, /* 0x940c */
> - 	{RCS, GAMT_CHKN_BIT_REG, 0x0, false}, /* 0x4ab8 */
> - 
> - 	{RCS, GEN9_GAMT_ECO_REG_RW_IA, 0x0, false}, /* 0x4ab0 */
> - 	{RCS, GEN9_CSFE_CHICKEN1_RCS, 0xffff, false}, /* 0x20d4 */
> - 	{RCS, _MMIO(0x20D8), 0xffff, true}, /* 0x20d8 */
> - 
> - 	{RCS, GEN8_GARBCNTL, 0x0, false}, /* 0xb004 */
> - 	{RCS, GEN7_FF_THREAD_MODE, 0x0, false}, /* 0x20a0 */
> - 	{RCS, FF_SLICE_CS_CHICKEN2, 0xffff, false}, /* 0x20e4 */
> - 	{RCS, INVALID_MMIO_REG, 0, false } /* Terminated */
> + 	{RCS0, GFX_MODE_GEN7, 0xffff, false}, /* 0x229c */
> + 	{RCS0, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
> + 	{RCS0, HWSTAM, 0x0, false}, /* 0x2098 */
> + 	{RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 5), 0, false}, /* 0x24e4 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 6), 0, false}, /* 0x24e8 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 7), 0, false}, /* 0x24ec */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 8), 0, false}, /* 0x24f0 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 9), 0, false}, /* 0x24f4 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 10), 0, false}, /* 0x24f8 */
> + 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 11), 0, false}, /* 0x24fc */
> + 	{RCS0, CACHE_MODE_1, 0xffff, true}, /* 0x7004 */
> + 	{RCS0, GEN7_GT_MODE, 0xffff, true}, /* 0x7008 */
> + 	{RCS0, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */
> + 	{RCS0, GEN7_COMMON_SLICE_CHICKEN1, 0xffff, true}, /* 0x7010 */
> + 	{RCS0, HDC_CHICKEN0, 0xffff, true}, /* 0x7300 */
> + 	{RCS0, VF_GUARDBAND, 0xffff, true}, /* 0x83a4 */
> + 
> + 	{RCS0, GEN8_PRIVATE_PAT_LO, 0, false}, /* 0x40e0 */
> + 	{RCS0, GEN8_PRIVATE_PAT_HI, 0, false}, /* 0x40e4 */
> + 	{RCS0, GEN8_CS_CHICKEN1, 0xffff, true}, /* 0x2580 */
> + 	{RCS0, COMMON_SLICE_CHICKEN2, 0xffff, true}, /* 0x7014 */
> + 	{RCS0, GEN9_CS_DEBUG_MODE1, 0xffff, false}, /* 0x20ec */
> + 	{RCS0, GEN8_L3SQCREG4, 0, false}, /* 0xb118 */
> + 	{RCS0, GEN7_HALF_SLICE_CHICKEN1, 0xffff, true}, /* 0xe100 */
> + 	{RCS0, HALF_SLICE_CHICKEN2, 0xffff, true}, /* 0xe180 */
> + 	{RCS0, HALF_SLICE_CHICKEN3, 0xffff, true}, /* 0xe184 */
> + 	{RCS0, GEN9_HALF_SLICE_CHICKEN5, 0xffff, true}, /* 0xe188 */
> + 	{RCS0, GEN9_HALF_SLICE_CHICKEN7, 0xffff, true}, /* 0xe194 */
> + 	{RCS0, GEN8_ROW_CHICKEN, 0xffff, true}, /* 0xe4f0 */
> + 	{RCS0, TRVATTL3PTRDW(0), 0, false}, /* 0x4de0 */
> + 	{RCS0, TRVATTL3PTRDW(1), 0, false}, /* 0x4de4 */
> + 	{RCS0, TRNULLDETCT, 0, false}, /* 0x4de8 */
> + 	{RCS0, TRINVTILEDETCT, 0, false}, /* 0x4dec */
> + 	{RCS0, TRVADR, 0, false}, /* 0x4df0 */
> + 	{RCS0, TRTTE, 0, false}, /* 0x4df4 */
> + 
> + 	{BCS0, RING_GFX_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2229c */
> + 	{BCS0, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
> + 	{BCS0, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
> + 	{BCS0, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
> + 	{BCS0, RING_EXCC(BLT_RING_BASE), 0x0, false}, /* 0x22028 */
> + 
> + 	{VCS1, RING_EXCC(GEN8_BSD2_RING_BASE), 0xffff, false}, /* 0x1c028 */
> + 
> + 	{VECS0, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */
> + 
> + 	{RCS0, GEN8_HDC_CHICKEN1, 0xffff, true}, /* 0x7304 */
> + 	{RCS0, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
> + 	{RCS0, GEN7_UCGCTL4, 0x0, false}, /* 0x940c */
> + 	{RCS0, GAMT_CHKN_BIT_REG, 0x0, false}, /* 0x4ab8 */
> + 
> + 	{RCS0, GEN9_GAMT_ECO_REG_RW_IA, 0x0, false}, /* 0x4ab0 */
> + 	{RCS0, GEN9_CSFE_CHICKEN1_RCS, 0xffff, false}, /* 0x20d4 */
> ++	{RCS0, _MMIO(0x20D8), 0xffff, true}, /* 0x20d8 */
> + 
> + 	{RCS0, GEN8_GARBCNTL, 0x0, false}, /* 0xb004 */
> + 	{RCS0, GEN7_FF_THREAD_MODE, 0x0, false}, /* 0x20a0 */
> + 	{RCS0, FF_SLICE_CS_CHICKEN2, 0xffff, false}, /* 0x20e4 */
> + 	{RCS0, INVALID_MMIO_REG, 0, false } /* Terminated */
>   };
>   
>   static struct {

-- 
Cheers,
Stephen Rothwell

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/gvt/mmio_context.c

between commit:

  1e8b15a1988e ("drm/i915/gvt: Add in context mmio 0x20D8 to gen9 mmio list")

from the drm-intel-fixes tree and commit:

  8a68d464366e ("drm/i915: Store the BIT(engine->id) as the engine's mask")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/i915/gvt/mmio_context.c
index 7902fb162d09,a00a807a1d55..000000000000
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@@ -73,71 -73,70 +73,71 @@@ static struct engine_mmio gen8_engine_m
  };
  
  static struct engine_mmio gen9_engine_mmio_list[] __cacheline_aligned = {
- 	{RCS, GFX_MODE_GEN7, 0xffff, false}, /* 0x229c */
- 	{RCS, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
- 	{RCS, HWSTAM, 0x0, false}, /* 0x2098 */
- 	{RCS, INSTPM, 0xffff, true}, /* 0x20c0 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 5), 0, false}, /* 0x24e4 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 6), 0, false}, /* 0x24e8 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 7), 0, false}, /* 0x24ec */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 8), 0, false}, /* 0x24f0 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 9), 0, false}, /* 0x24f4 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 10), 0, false}, /* 0x24f8 */
- 	{RCS, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 11), 0, false}, /* 0x24fc */
- 	{RCS, CACHE_MODE_1, 0xffff, true}, /* 0x7004 */
- 	{RCS, GEN7_GT_MODE, 0xffff, true}, /* 0x7008 */
- 	{RCS, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */
- 	{RCS, GEN7_COMMON_SLICE_CHICKEN1, 0xffff, true}, /* 0x7010 */
- 	{RCS, HDC_CHICKEN0, 0xffff, true}, /* 0x7300 */
- 	{RCS, VF_GUARDBAND, 0xffff, true}, /* 0x83a4 */
- 
- 	{RCS, GEN8_PRIVATE_PAT_LO, 0, false}, /* 0x40e0 */
- 	{RCS, GEN8_PRIVATE_PAT_HI, 0, false}, /* 0x40e4 */
- 	{RCS, GEN8_CS_CHICKEN1, 0xffff, true}, /* 0x2580 */
- 	{RCS, COMMON_SLICE_CHICKEN2, 0xffff, true}, /* 0x7014 */
- 	{RCS, GEN9_CS_DEBUG_MODE1, 0xffff, false}, /* 0x20ec */
- 	{RCS, GEN8_L3SQCREG4, 0, false}, /* 0xb118 */
- 	{RCS, GEN7_HALF_SLICE_CHICKEN1, 0xffff, true}, /* 0xe100 */
- 	{RCS, HALF_SLICE_CHICKEN2, 0xffff, true}, /* 0xe180 */
- 	{RCS, HALF_SLICE_CHICKEN3, 0xffff, true}, /* 0xe184 */
- 	{RCS, GEN9_HALF_SLICE_CHICKEN5, 0xffff, true}, /* 0xe188 */
- 	{RCS, GEN9_HALF_SLICE_CHICKEN7, 0xffff, true}, /* 0xe194 */
- 	{RCS, GEN8_ROW_CHICKEN, 0xffff, true}, /* 0xe4f0 */
- 	{RCS, TRVATTL3PTRDW(0), 0, false}, /* 0x4de0 */
- 	{RCS, TRVATTL3PTRDW(1), 0, false}, /* 0x4de4 */
- 	{RCS, TRNULLDETCT, 0, false}, /* 0x4de8 */
- 	{RCS, TRINVTILEDETCT, 0, false}, /* 0x4dec */
- 	{RCS, TRVADR, 0, false}, /* 0x4df0 */
- 	{RCS, TRTTE, 0, false}, /* 0x4df4 */
- 
- 	{BCS, RING_GFX_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2229c */
- 	{BCS, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
- 	{BCS, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
- 	{BCS, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
- 	{BCS, RING_EXCC(BLT_RING_BASE), 0x0, false}, /* 0x22028 */
- 
- 	{VCS2, RING_EXCC(GEN8_BSD2_RING_BASE), 0xffff, false}, /* 0x1c028 */
- 
- 	{VECS, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */
- 
- 	{RCS, GEN8_HDC_CHICKEN1, 0xffff, true}, /* 0x7304 */
- 	{RCS, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
- 	{RCS, GEN7_UCGCTL4, 0x0, false}, /* 0x940c */
- 	{RCS, GAMT_CHKN_BIT_REG, 0x0, false}, /* 0x4ab8 */
- 
- 	{RCS, GEN9_GAMT_ECO_REG_RW_IA, 0x0, false}, /* 0x4ab0 */
- 	{RCS, GEN9_CSFE_CHICKEN1_RCS, 0xffff, false}, /* 0x20d4 */
- 	{RCS, _MMIO(0x20D8), 0xffff, true}, /* 0x20d8 */
- 
- 	{RCS, GEN8_GARBCNTL, 0x0, false}, /* 0xb004 */
- 	{RCS, GEN7_FF_THREAD_MODE, 0x0, false}, /* 0x20a0 */
- 	{RCS, FF_SLICE_CS_CHICKEN2, 0xffff, false}, /* 0x20e4 */
- 	{RCS, INVALID_MMIO_REG, 0, false } /* Terminated */
+ 	{RCS0, GFX_MODE_GEN7, 0xffff, false}, /* 0x229c */
+ 	{RCS0, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
+ 	{RCS0, HWSTAM, 0x0, false}, /* 0x2098 */
+ 	{RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 5), 0, false}, /* 0x24e4 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 6), 0, false}, /* 0x24e8 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 7), 0, false}, /* 0x24ec */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 8), 0, false}, /* 0x24f0 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 9), 0, false}, /* 0x24f4 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 10), 0, false}, /* 0x24f8 */
+ 	{RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 11), 0, false}, /* 0x24fc */
+ 	{RCS0, CACHE_MODE_1, 0xffff, true}, /* 0x7004 */
+ 	{RCS0, GEN7_GT_MODE, 0xffff, true}, /* 0x7008 */
+ 	{RCS0, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */
+ 	{RCS0, GEN7_COMMON_SLICE_CHICKEN1, 0xffff, true}, /* 0x7010 */
+ 	{RCS0, HDC_CHICKEN0, 0xffff, true}, /* 0x7300 */
+ 	{RCS0, VF_GUARDBAND, 0xffff, true}, /* 0x83a4 */
+ 
+ 	{RCS0, GEN8_PRIVATE_PAT_LO, 0, false}, /* 0x40e0 */
+ 	{RCS0, GEN8_PRIVATE_PAT_HI, 0, false}, /* 0x40e4 */
+ 	{RCS0, GEN8_CS_CHICKEN1, 0xffff, true}, /* 0x2580 */
+ 	{RCS0, COMMON_SLICE_CHICKEN2, 0xffff, true}, /* 0x7014 */
+ 	{RCS0, GEN9_CS_DEBUG_MODE1, 0xffff, false}, /* 0x20ec */
+ 	{RCS0, GEN8_L3SQCREG4, 0, false}, /* 0xb118 */
+ 	{RCS0, GEN7_HALF_SLICE_CHICKEN1, 0xffff, true}, /* 0xe100 */
+ 	{RCS0, HALF_SLICE_CHICKEN2, 0xffff, true}, /* 0xe180 */
+ 	{RCS0, HALF_SLICE_CHICKEN3, 0xffff, true}, /* 0xe184 */
+ 	{RCS0, GEN9_HALF_SLICE_CHICKEN5, 0xffff, true}, /* 0xe188 */
+ 	{RCS0, GEN9_HALF_SLICE_CHICKEN7, 0xffff, true}, /* 0xe194 */
+ 	{RCS0, GEN8_ROW_CHICKEN, 0xffff, true}, /* 0xe4f0 */
+ 	{RCS0, TRVATTL3PTRDW(0), 0, false}, /* 0x4de0 */
+ 	{RCS0, TRVATTL3PTRDW(1), 0, false}, /* 0x4de4 */
+ 	{RCS0, TRNULLDETCT, 0, false}, /* 0x4de8 */
+ 	{RCS0, TRINVTILEDETCT, 0, false}, /* 0x4dec */
+ 	{RCS0, TRVADR, 0, false}, /* 0x4df0 */
+ 	{RCS0, TRTTE, 0, false}, /* 0x4df4 */
+ 
+ 	{BCS0, RING_GFX_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2229c */
+ 	{BCS0, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
+ 	{BCS0, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
+ 	{BCS0, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
+ 	{BCS0, RING_EXCC(BLT_RING_BASE), 0x0, false}, /* 0x22028 */
+ 
+ 	{VCS1, RING_EXCC(GEN8_BSD2_RING_BASE), 0xffff, false}, /* 0x1c028 */
+ 
+ 	{VECS0, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */
+ 
+ 	{RCS0, GEN8_HDC_CHICKEN1, 0xffff, true}, /* 0x7304 */
+ 	{RCS0, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
+ 	{RCS0, GEN7_UCGCTL4, 0x0, false}, /* 0x940c */
+ 	{RCS0, GAMT_CHKN_BIT_REG, 0x0, false}, /* 0x4ab8 */
+ 
+ 	{RCS0, GEN9_GAMT_ECO_REG_RW_IA, 0x0, false}, /* 0x4ab0 */
+ 	{RCS0, GEN9_CSFE_CHICKEN1_RCS, 0xffff, false}, /* 0x20d4 */
++	{RCS0, _MMIO(0x20D8), 0xffff, true}, /* 0x20d8 */
+ 
+ 	{RCS0, GEN8_GARBCNTL, 0x0, false}, /* 0xb004 */
+ 	{RCS0, GEN7_FF_THREAD_MODE, 0x0, false}, /* 0x20a0 */
+ 	{RCS0, FF_SLICE_CS_CHICKEN2, 0xffff, false}, /* 0x20e4 */
+ 	{RCS0, INVALID_MMIO_REG, 0, false } /* Terminated */
  };
  
  static struct {

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Mark Brown]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/i915_gem_evict.c

between commit:

  99b169d3c2052 ("drm/i915: Fix eviction when the GGTT is idle but full")

from the drm-intel-fixes tree and commit:

  9c1477e83e629 ("drm/i915/selftests: Exercise adding requests to a full GGTT")

from the drm-intel tree.

I fixed it up (null diff) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

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Re: linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Mark Brown]

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On Tue, Oct 17, 2017 at 10:11:53AM +0200, Arnd Bergmann wrote:

> This merge seems fine, but it seems there was another merge
> against the akpm tree that introduced a build error by reintroducing
> the spin_lock_irqsave() without restoring the local variable:

> drivers/gpu/drm/i915/i915_gem.c: In function 'nop_submit_request':
> drivers/gpu/drm/i915/i915_gem.c:3092:54: error: 'flags' undeclared
> (first use in this function); did you mean 'class'?

> I'll send my local build fix, which may or may not be the intended
> behavior but gets it to compile.

Bother, that was actually an automated merge git did.

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Re: linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Arnd Bergmann]

On Mon, Oct 16, 2017 at 1:35 PM, Mark Brown <broonie@kernel.org> wrote:
> Hi all,
>
> Today's linux-next merge of the drm-intel tree got a conflict in:
>
>   drivers/gpu/drm/i915/i915_gem.c
>
> between commit:
>
>   b85577b72837e ("drm/i915: Order two completing nop_submit_request")
>
> from the drm-intel-fixes tree and commit:
>
>   5d031f4e1618b ("drm/i915: Stop asserting on set-wedged vs nop_submit_request ordering")
>
> from the drm-intel tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.

This merge seems fine, but it seems there was another merge
against the akpm tree that introduced a build error by reintroducing
the spin_lock_irqsave() without restoring the local variable:

drivers/gpu/drm/i915/i915_gem.c: In function 'nop_submit_request':
drivers/gpu/drm/i915/i915_gem.c:3092:54: error: 'flags' undeclared
(first use in this function); did you mean 'class'?

I'll send my local build fix, which may or may not be the intended
behavior but gets it to compile.

      Arnd

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Mark Brown]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/i915_gem.c

between commit:

  b85577b72837e ("drm/i915: Order two completing nop_submit_request")

from the drm-intel-fixes tree and commit:

  5d031f4e1618b ("drm/i915: Stop asserting on set-wedged vs nop_submit_request ordering")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index bace56523e9f..4fdebca8ff40 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3089,20 +3089,14 @@ static void nop_submit_request(struct drm_i915_gem_request *request)
 {
 	unsigned long flags;
 
-	GEM_BUG_ON(!i915_terminally_wedged(&request->i915->gpu_error));
 	dma_fence_set_error(&request->fence, -EIO);
-
-	spin_lock_irqsave(&request->engine->timeline->lock, flags);
-	__i915_gem_request_submit(request);
-	intel_engine_init_global_seqno(request->engine, request->global_seqno);
-	spin_unlock_irqrestore(&request->engine->timeline->lock, flags);
+	i915_gem_request_submit(request);
 }
 
 static void nop_complete_submit_request(struct drm_i915_gem_request *request)
 {
 	unsigned long flags;
 
-	GEM_BUG_ON(!i915_terminally_wedged(&request->i915->gpu_error));
 	dma_fence_set_error(&request->fence, -EIO);
 
 	spin_lock_irqsave(&request->engine->timeline->lock, flags);

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Mark Brown]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/i915_gem.c

between commit:

  b85577b72837ee ("drm/i915: Order two completing nop_submit_request")

from the drm-intel-fixes tree and commit:

  af7a8ffad9c58d ("drm/i915: Use rcu instead of stop_machine in set_wedged")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

diff --cc drivers/gpu/drm/i915/i915_gem.c
index d5e58d4a5950,20fcac37c85a..000000000000
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@@ -3019,36 -3090,24 +3092,27 @@@ static void nop_submit_request(struct d
  	GEM_BUG_ON(!i915_terminally_wedged(&request->i915->gpu_error));
  	dma_fence_set_error(&request->fence, -EIO);
  
 -	i915_gem_request_submit(request);
 +	spin_lock_irqsave(&request->engine->timeline->lock, flags);
 +	__i915_gem_request_submit(request);
 +	intel_engine_init_global_seqno(request->engine, request->global_seqno);
 +	spin_unlock_irqrestore(&request->engine->timeline->lock, flags);
  }
  
- static void engine_set_wedged(struct intel_engine_cs *engine)
+ static void nop_complete_submit_request(struct drm_i915_gem_request *request)
  {
- 	/* We need to be sure that no thread is running the old callback as
- 	 * we install the nop handler (otherwise we would submit a request
- 	 * to hardware that will never complete). In order to prevent this
- 	 * race, we wait until the machine is idle before making the swap
- 	 * (using stop_machine()).
- 	 */
- 	engine->submit_request = nop_submit_request;
+ 	unsigned long flags;
  
- 	/* Mark all executing requests as skipped */
- 	engine->cancel_requests(engine);
+ 	GEM_BUG_ON(!i915_terminally_wedged(&request->i915->gpu_error));
+ 	dma_fence_set_error(&request->fence, -EIO);
  
- 	/* Mark all pending requests as complete so that any concurrent
- 	 * (lockless) lookup doesn't try and wait upon the request as we
- 	 * reset it.
- 	 */
- 	intel_engine_init_global_seqno(engine,
- 				       intel_engine_last_submit(engine));
+ 	spin_lock_irqsave(&request->engine->timeline->lock, flags);
+ 	__i915_gem_request_submit(request);
+ 	intel_engine_init_global_seqno(request->engine, request->global_seqno);
+ 	spin_unlock_irqrestore(&request->engine->timeline->lock, flags);
  }
  
- static int __i915_gem_set_wedged_BKL(void *data)
+ void i915_gem_set_wedged(struct drm_i915_private *i915)
  {
- 	struct drm_i915_private *i915 = data;
  	struct intel_engine_cs *engine;
  	enum intel_engine_id id;
  

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Mark Brown]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_display.c

between commit:

   7b50f7b24cd6c ("rm/i915: Read timings from the correct transcoder in intel_crtc_mode_get()")

from the drm-intel-fixes tree and commit:

   de330815677d8 ("drm/i915: Reuse normal state readout for LVDS/DVO fixed mode")

from the drm-intel tree.

I fixed it up by taking the version from the drm-intel tree and can
carry the fix as necessary. This is now fixed as far as linux-next is
concerned, but any non trivial conflicts should be mentioned to your
upstream maintainer when your tree is submitted for merging.  You may
also want to consider cooperating with the maintainer of the conflicting
tree to minimise any particularly complex conflicts.

[-- Attachment #2: signature.asc --]
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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_engine_cs.c

between commit:

  d9533f19d840 ("drm/i915: Hold a wakeref for probing the ring registers")
(which is also commit a091d4ee931b in the drm-intel tree)

from the drm-intel-fixes tree and commit:

  aed2fc102ffa ("drm/i915: Check the ring is empty when declaring the engines are idle")

from the drm-intel tree.

I fixed it up (I just used the drm-intel tree version) and can carry the
fix as necessary. This is now fixed as far as linux-next is concerned,
but any non trivial conflicts should be mentioned to your upstream
maintainer when your tree is submitted for merging.  You may also want
to consider cooperating with the maintainer of the conflicting tree to
minimise any particularly complex conflicts.

-- 
Cheers,
Stephen Rothwell

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/i915_gem_gtt.c

between commit:

  d90c98905afd ("drm/i915: Guard against i915_ggtt_disable_guc() being invoked unconditionally")
(which also appears as commit cb60606d835c in the drm-intel tree)

from the drm-intel-fixes tree and commit:

  04f7b24eccdf ("drm/i915/guc: Assert that we switch between known ggtt->invalidate functions")

from the drm-intel tree.

I fixed it up (I just used the drm-intel tree version) and can carry the
fix as necessary. This is now fixed as far as linux-next is concerned,
but any non trivial conflicts should be mentioned to your upstream
maintainer when your tree is submitted for merging.  You may also want
to consider cooperating with the maintainer of the conflicting tree to
minimise any particularly complex conflicts.

-- 
Cheers,
Stephen Rothwell

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/gvt/scheduler.c

between commit:

  3cd23b828b37 ("drm/i915/gvt: GVT pin/unpin shadow context")

from the drm-intel-fixes tree and commit:

  e642c85b03de ("drm/i915: Remove superfluous i915_add_request_no_flush() helper")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/i915/gvt/scheduler.c
index 39a83eb7aecc,31d2240fdb1f..000000000000
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@@ -246,10 -212,7 +244,10 @@@ out
  		workload->status = ret;
  
  	if (!IS_ERR_OR_NULL(rq))
- 		i915_add_request_no_flush(rq);
+ 		i915_add_request(rq);
 +	else
 +		engine->context_unpin(engine, shadow_ctx);
 +
  	mutex_unlock(&dev_priv->drm.struct_mutex);
  	return ret;
  }

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_display.c

between commits from the drm-intel-fixes tree (some of which are
cherry-picked from the drm-intel tree) and teh same and other commits
from the drm-inte tree.  These are just going to cause new conflicts
every time you touch this file again in either tree (which happens a
lot :-().

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider only putting
the fix patches into the drm-intel-fixes tree and then getting them
into the drm-intel tree by merging the -fixes tree instead of
cherry-picking them the other way.

-- 
Cheers,
Stephen Rothwell

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_drv.h

between commit:

  f403372658fc ("drm/i915/skl: Add support for the SAGV, fix underrun hangs")
  (which is a chery-pick of commit 656d1b89e5ff from the drm-intel tree)

from the drm-intel-fixes tree and commit:

  62e0fb880123 ("drm/i915/skl: Update plane watermarks atomically during plane updates")

from the drm-intel tree.

I fixed it up (I just used the drm-intel tree version) and can carry the
fix as necessary. This is now fixed as far as linux-next is concerned,
but any non trivial conflicts should be mentioned to your upstream
maintainer when your tree is submitted for merging.  You may also want
to consider cooperating with the maintainer of the conflicting tree to
minimise any particularly complex conflicts.

-- 
Cheers,
Stephen Rothwell

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_fbc.c

between commit:

  1e3fa0acfec6 ("drm/i915/fbc: Disable on HSW by default for now")

from the drm-intel-fixes tree and commit:

  80788a0fbbdf ("drm/i915/fbc: sanitize i915.enable_fbc during FBC init")

from the drm-intel tree.

I fixed it up (since the former patch appears on both trees, I just
used the latter) and can carry the fix as necessary. This is now fixed
as far as linux-next is concerned, but any non trivial conflicts should
be mentioned to your upstream maintainer when your tree is submitted for
merging.  You may also want to consider cooperating with the maintainer
of the conflicting tree to minimise any particularly complex conflicts.

-- 
Cheers,
Stephen Rothwell

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_display.c

between commit:

  76dc3769d7c3 ("drm/i915: Don't clobber the addfb2 ioctl params")

from the drm-intel-fixes tree and commit:

  dcb1394e74e3 ("drm/i915: On fb alloc failure, unref gem object where it gets refed")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_display.c
index 8f80bbeb1313,4cfcd3eea7d8..000000000000
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -2398,26 -2385,23 +2394,25 @@@ intel_pin_and_fence_fb_obj(struct drm_p
  	 * framebuffer compression.  For simplicity, we always install
  	 * a fence as the cost is not that onerous.
  	 */
 -	ret = i915_gem_object_get_fence(obj);
 -	if (ret == -EDEADLK) {
 -		/*
 -		 * -EDEADLK means there are no free fences
 -		 * no pending flips.
 -		 *
 -		 * This is propagated to atomic, but it uses
 -		 * -EDEADLK to force a locking recovery, so
 -		 * change the returned error to -EBUSY.
 -		 */
 -		ret = -EBUSY;
 -		goto err_unpin;
 -	} else if (ret)
 -		goto err_unpin;
 +	if (view.type == I915_GGTT_VIEW_NORMAL) {
 +		ret = i915_gem_object_get_fence(obj);
 +		if (ret == -EDEADLK) {
 +			/*
 +			 * -EDEADLK means there are no free fences
 +			 * no pending flips.
 +			 *
 +			 * This is propagated to atomic, but it uses
 +			 * -EDEADLK to force a locking recovery, so
 +			 * change the returned error to -EBUSY.
 +			 */
 +			ret = -EBUSY;
 +			goto err_unpin;
 +		} else if (ret)
 +			goto err_unpin;
  
 -	i915_gem_object_pin_fence(obj);
 +		i915_gem_object_pin_fence(obj);
 +	}
  
- 	dev_priv->mm.interruptible = true;
  	intel_runtime_pm_put(dev_priv);
  	return 0;
  
@@@ -14369,17 -14560,21 +14583,22 @@@ static int intel_framebuffer_init(struc
  static struct drm_framebuffer *
  intel_user_framebuffer_create(struct drm_device *dev,
  			      struct drm_file *filp,
 -			      struct drm_mode_fb_cmd2 *mode_cmd)
 +			      struct drm_mode_fb_cmd2 *user_mode_cmd)
  {
+ 	struct drm_framebuffer *fb;
  	struct drm_i915_gem_object *obj;
 +	struct drm_mode_fb_cmd2 mode_cmd = *user_mode_cmd;
  
  	obj = to_intel_bo(drm_gem_object_lookup(dev, filp,
 -						mode_cmd->handles[0]));
 +						mode_cmd.handles[0]));
  	if (&obj->base == NULL)
  		return ERR_PTR(-ENOENT);
  
- 	return intel_framebuffer_create(dev, &mode_cmd, obj);
 -	fb = intel_framebuffer_create(dev, mode_cmd, obj);
++	fb = intel_framebuffer_create(dev, &mode_cmd, obj);
+ 	if (IS_ERR(fb))
+ 		drm_gem_object_unreference_unlocked(&obj->base);
+ 
+ 	return fb;
  }
  
  #ifndef CONFIG_DRM_FBDEV_EMULATION

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_lrc.c

between commit:

  dfc53c5e73f8 ("drm/i915: Consider HW CSB write pointer before resetting the sw read pointer")

from the drm-intel-fixes tree and commit:

  83843d84fcd3 ("drm/i915: Parametrize LRC registers")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_lrc.c
index 7412caedcf7f,256167b2e2ab..000000000000
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@@ -492,10 -519,8 +519,8 @@@ void intel_lrc_irq_handler(struct intel
  
  	while (read_pointer < write_pointer) {
  		read_pointer++;
- 		status = I915_READ(RING_CONTEXT_STATUS_BUF(ring) +
- 				(read_pointer % GEN8_CSB_ENTRIES) * 8);
- 		status_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) +
- 				(read_pointer % GEN8_CSB_ENTRIES) * 8 + 4);
 -		status = I915_READ(RING_CONTEXT_STATUS_BUF_LO(ring, read_pointer % 6));
 -		status_id = I915_READ(RING_CONTEXT_STATUS_BUF_HI(ring, read_pointer % 6));
++		status = I915_READ(RING_CONTEXT_STATUS_BUF_LO(ring, read_pointer % GEN8_CSB_ENTRIES));
++		status_id = I915_READ(RING_CONTEXT_STATUS_BUF_HI(ring, read_pointer % GEN8_CSB_ENTRIES));
  
  		if (status & GEN8_CTX_STATUS_IDLE_ACTIVE)
  			continue;
@@@ -1424,8 -1477,10 +1479,11 @@@ static int gen8_init_common_ring(struc
  {
  	struct drm_device *dev = ring->dev;
  	struct drm_i915_private *dev_priv = dev->dev_private;
 +	u8 next_context_status_buffer_hw;
  
+ 	lrc_setup_hardware_status_page(ring,
+ 				ring->default_context->engine[ring->id].state);
+ 
  	I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
  	I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff);
  

Re: linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi Jani,

On Thu, 24 Sep 2015 11:57:05 +0300 Jani Nikula <jani.nikula@linux.intel.com> wrote:
>
> That was the right thing to do.
> 
> The former commit is headed for v4.3, and there will have to be another
> version of it for -next. This will cause you another conflict, and you
> should resolve it with the same approach.

OK, thanks.

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

Re: linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Jani Nikula]

On Thu, 24 Sep 2015, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> Hi all,
>
> Today's linux-next merge of the drm-intel tree got a conflict in:
>
>   drivers/gpu/drm/i915/intel_display.c
>
> between commit:
>
>   721a09f7393d ("drm/i915: Add primary plane to mask if it's visible")
>
> from the drm-intel-fixes tree and commit:
>
>   f9cd7b881a04 ("drm/i915: Move sprite/cursor plane disable to intel_sanitize_crtc()")
>
> from the drm-intel tree.
>
> I fixed it up (I have no idea what do to here, so I just used the version
> from the drm-intel tree) and can carry the fix as necessary (no action
> is required - unless there is a better fix).

That was the right thing to do.

The former commit is headed for v4.3, and there will have to be another
version of it for -next. This will cause you another conflict, and you
should resolve it with the same approach.

Thanks,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_display.c

between commit:

  721a09f7393d ("drm/i915: Add primary plane to mask if it's visible")

from the drm-intel-fixes tree and commit:

  f9cd7b881a04 ("drm/i915: Move sprite/cursor plane disable to intel_sanitize_crtc()")

from the drm-intel tree.

I fixed it up (I have no idea what do to here, so I just used the version
from the drm-intel tree) and can carry the fix as necessary (no action
is required - unless there is a better fix).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_display.c

between commit:

  ccfb8b2ed4d4 ("rm/i915: Do not call intel_crtc_disable if the crtc is already disabled.")

from the drm-intel-fixes tree and commit:

  69024de8ba9e ("drm/i915: get rid of intel_crtc_disable and related code, v3")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_display.c
index 30e0f54ba19d,4e64dae78360..000000000000
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -4851,25 -4815,13 +4815,16 @@@ static void intel_crtc_disable_planes(s
  {
  	struct drm_device *dev = crtc->dev;
  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct intel_plane *intel_plane;
+ 	struct drm_plane *p;
  	int pipe = intel_crtc->pipe;
  
 +	if (!intel_crtc->active)
 +		return;
 +
- 	intel_crtc_wait_for_pending_flips(crtc);
- 
- 	intel_pre_disable_primary(crtc);
- 
  	intel_crtc_dpms_overlay_disable(intel_crtc);
- 	for_each_intel_plane(dev, intel_plane) {
- 		if (intel_plane->pipe == pipe) {
- 			struct drm_crtc *from = intel_plane->base.crtc;
  
- 			intel_plane->disable_plane(&intel_plane->base,
- 						   from ?: crtc, true);
- 		}
- 	}
+ 	drm_for_each_plane_mask(p, dev, plane_mask)
+ 		to_intel_plane(p)->disable_plane(p, crtc);
  
  	/*
  	 * FIXME: Once we grow proper nuclear flip support out of this we need
@@@ -13380,47 -13823,11 +13829,14 @@@ static void intel_begin_crtc_commit(str
  	struct drm_device *dev = crtc->dev;
  	struct drm_i915_private *dev_priv = dev->dev_private;
  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct intel_plane *intel_plane;
- 	struct drm_plane *p;
- 	unsigned fb_bits = 0;
- 
- 	/* Track fb's for any planes being disabled */
- 	list_for_each_entry(p, &dev->mode_config.plane_list, head) {
- 		intel_plane = to_intel_plane(p);
- 
- 		if (intel_crtc->atomic.disabled_planes &
- 		    (1 << drm_plane_index(p))) {
- 			switch (p->type) {
- 			case DRM_PLANE_TYPE_PRIMARY:
- 				fb_bits = INTEL_FRONTBUFFER_PRIMARY(intel_plane->pipe);
- 				break;
- 			case DRM_PLANE_TYPE_CURSOR:
- 				fb_bits = INTEL_FRONTBUFFER_CURSOR(intel_plane->pipe);
- 				break;
- 			case DRM_PLANE_TYPE_OVERLAY:
- 				fb_bits = INTEL_FRONTBUFFER_SPRITE(intel_plane->pipe);
- 				break;
- 			}
- 
- 			mutex_lock(&dev->struct_mutex);
- 			i915_gem_track_fb(intel_fb_obj(p->fb), NULL, fb_bits);
- 			mutex_unlock(&dev->struct_mutex);
- 		}
- 	}
- 
- 	if (intel_crtc->atomic.wait_for_flips)
- 		intel_crtc_wait_for_pending_flips(crtc);
  
- 	if (intel_crtc->atomic.disable_fbc)
- 		intel_fbc_disable(dev);
+ 	if (!needs_modeset(crtc->state))
+ 		intel_pre_plane_update(intel_crtc);
  
 +	if (intel_crtc->atomic.disable_ips)
 +		hsw_disable_ips(intel_crtc);
 +
- 	if (intel_crtc->atomic.pre_disable_primary)
- 		intel_pre_disable_primary(crtc);
- 
- 	if (intel_crtc->atomic.update_wm)
+ 	if (intel_crtc->atomic.update_wm_pre)
  		intel_update_watermarks(crtc);
  
  	intel_runtime_pm_get(dev_priv);

Re: linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Daniel Vetter]

On Tue, Jul 14, 2015 at 12:11:12PM +1000, Stephen Rothwell wrote:
> Hi all,
> 
> Today's linux-next merge of the drm-intel tree got a conflict in:
> 
>   drivers/gpu/drm/i915/intel_display.c
> 
> between commit:
> 
>   8aa3053bf731 ("drm/i915: fix oops in primary_check_plane")
> 
> from the drm-intel-fixes tree and commit:
> 
>   da20eabd2c69 ("drm/i915: Split plane updates of crtc->atomic into a helper, v2.")
> 
> from the drm-intel tree.
> 
> I fixed it up (but it probably needs more - see below) and can carry
> the fix as necessary.
> 
> Daniel, can you please merge your fixes branch into your main branch
> (maybe after Linus has merged it) and fix these conflicts correctly as
> these conflicts tend to go on and on as the files get changed.

Well the problem is that they indeed go on and on and we still change them
so they resurface all the time. I've done a few backmerges in my next
branch already, I plan to do the next backmerge somewhen this week.

Sorry about all the pain this is causing.
-Daniel

> 
> -- 
> Cheers,
> Stephen Rothwell                    sfr@canb.auug.org.au
> 
> diff --cc drivers/gpu/drm/i915/intel_display.c
> index 85ac6d85dc39,00c60c1c5162..000000000000
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@@ -4851,25 -4802,13 +4802,16 @@@ static void intel_crtc_disable_planes(s
>   {
>   	struct drm_device *dev = crtc->dev;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> - 	struct intel_plane *intel_plane;
> + 	struct drm_plane *p;
>   	int pipe = intel_crtc->pipe;
>   
>  +	if (!intel_crtc->active)
>  +		return;
>  +
> - 	intel_crtc_wait_for_pending_flips(crtc);
> - 
> - 	intel_pre_disable_primary(crtc);
> - 
>   	intel_crtc_dpms_overlay_disable(intel_crtc);
> - 	for_each_intel_plane(dev, intel_plane) {
> - 		if (intel_plane->pipe == pipe) {
> - 			struct drm_crtc *from = intel_plane->base.crtc;
>   
> - 			intel_plane->disable_plane(&intel_plane->base,
> - 						   from ?: crtc, true);
> - 		}
> - 	}
> + 	drm_for_each_plane_mask(p, dev, plane_mask)
> + 		to_intel_plane(p)->disable_plane(p, crtc);
>   
>   	/*
>   	 * FIXME: Once we grow proper nuclear flip support out of this we need
> @@@ -13382,47 -13751,11 +13757,14 @@@ static void intel_begin_crtc_commit(str
>   	struct drm_device *dev = crtc->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> - 	struct intel_plane *intel_plane;
> - 	struct drm_plane *p;
> - 	unsigned fb_bits = 0;
> - 
> - 	/* Track fb's for any planes being disabled */
> - 	list_for_each_entry(p, &dev->mode_config.plane_list, head) {
> - 		intel_plane = to_intel_plane(p);
> - 
> - 		if (intel_crtc->atomic.disabled_planes &
> - 		    (1 << drm_plane_index(p))) {
> - 			switch (p->type) {
> - 			case DRM_PLANE_TYPE_PRIMARY:
> - 				fb_bits = INTEL_FRONTBUFFER_PRIMARY(intel_plane->pipe);
> - 				break;
> - 			case DRM_PLANE_TYPE_CURSOR:
> - 				fb_bits = INTEL_FRONTBUFFER_CURSOR(intel_plane->pipe);
> - 				break;
> - 			case DRM_PLANE_TYPE_OVERLAY:
> - 				fb_bits = INTEL_FRONTBUFFER_SPRITE(intel_plane->pipe);
> - 				break;
> - 			}
>   
> - 			mutex_lock(&dev->struct_mutex);
> - 			i915_gem_track_fb(intel_fb_obj(p->fb), NULL, fb_bits);
> - 			mutex_unlock(&dev->struct_mutex);
> - 		}
> - 	}
> - 
> - 	if (intel_crtc->atomic.wait_for_flips)
> - 		intel_crtc_wait_for_pending_flips(crtc);
> - 
> - 	if (intel_crtc->atomic.disable_fbc)
> - 		intel_fbc_disable(dev);
> + 	if (!needs_modeset(crtc->state))
> + 		intel_pre_plane_update(intel_crtc);
>   
>  +	if (intel_crtc->atomic.disable_ips)
>  +		hsw_disable_ips(intel_crtc);
>  +
> - 	if (intel_crtc->atomic.pre_disable_primary)
> - 		intel_pre_disable_primary(crtc);
> - 
> - 	if (intel_crtc->atomic.update_wm)
> + 	if (intel_crtc->atomic.update_wm_pre)
>   		intel_update_watermarks(crtc);
>   
>   	intel_runtime_pm_get(dev_priv);



-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_display.c

between commit:

  8aa3053bf731 ("drm/i915: fix oops in primary_check_plane")

from the drm-intel-fixes tree and commit:

  da20eabd2c69 ("drm/i915: Split plane updates of crtc->atomic into a helper, v2.")

from the drm-intel tree.

I fixed it up (but it probably needs more - see below) and can carry
the fix as necessary.

Daniel, can you please merge your fixes branch into your main branch
(maybe after Linus has merged it) and fix these conflicts correctly as
these conflicts tend to go on and on as the files get changed.

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_display.c
index 85ac6d85dc39,00c60c1c5162..000000000000
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -4851,25 -4802,13 +4802,16 @@@ static void intel_crtc_disable_planes(s
  {
  	struct drm_device *dev = crtc->dev;
  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct intel_plane *intel_plane;
+ 	struct drm_plane *p;
  	int pipe = intel_crtc->pipe;
  
 +	if (!intel_crtc->active)
 +		return;
 +
- 	intel_crtc_wait_for_pending_flips(crtc);
- 
- 	intel_pre_disable_primary(crtc);
- 
  	intel_crtc_dpms_overlay_disable(intel_crtc);
- 	for_each_intel_plane(dev, intel_plane) {
- 		if (intel_plane->pipe == pipe) {
- 			struct drm_crtc *from = intel_plane->base.crtc;
  
- 			intel_plane->disable_plane(&intel_plane->base,
- 						   from ?: crtc, true);
- 		}
- 	}
+ 	drm_for_each_plane_mask(p, dev, plane_mask)
+ 		to_intel_plane(p)->disable_plane(p, crtc);
  
  	/*
  	 * FIXME: Once we grow proper nuclear flip support out of this we need
@@@ -13382,47 -13751,11 +13757,14 @@@ static void intel_begin_crtc_commit(str
  	struct drm_device *dev = crtc->dev;
  	struct drm_i915_private *dev_priv = dev->dev_private;
  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct intel_plane *intel_plane;
- 	struct drm_plane *p;
- 	unsigned fb_bits = 0;
- 
- 	/* Track fb's for any planes being disabled */
- 	list_for_each_entry(p, &dev->mode_config.plane_list, head) {
- 		intel_plane = to_intel_plane(p);
- 
- 		if (intel_crtc->atomic.disabled_planes &
- 		    (1 << drm_plane_index(p))) {
- 			switch (p->type) {
- 			case DRM_PLANE_TYPE_PRIMARY:
- 				fb_bits = INTEL_FRONTBUFFER_PRIMARY(intel_plane->pipe);
- 				break;
- 			case DRM_PLANE_TYPE_CURSOR:
- 				fb_bits = INTEL_FRONTBUFFER_CURSOR(intel_plane->pipe);
- 				break;
- 			case DRM_PLANE_TYPE_OVERLAY:
- 				fb_bits = INTEL_FRONTBUFFER_SPRITE(intel_plane->pipe);
- 				break;
- 			}
  
- 			mutex_lock(&dev->struct_mutex);
- 			i915_gem_track_fb(intel_fb_obj(p->fb), NULL, fb_bits);
- 			mutex_unlock(&dev->struct_mutex);
- 		}
- 	}
- 
- 	if (intel_crtc->atomic.wait_for_flips)
- 		intel_crtc_wait_for_pending_flips(crtc);
- 
- 	if (intel_crtc->atomic.disable_fbc)
- 		intel_fbc_disable(dev);
+ 	if (!needs_modeset(crtc->state))
+ 		intel_pre_plane_update(intel_crtc);
  
 +	if (intel_crtc->atomic.disable_ips)
 +		hsw_disable_ips(intel_crtc);
 +
- 	if (intel_crtc->atomic.pre_disable_primary)
- 		intel_pre_disable_primary(crtc);
- 
- 	if (intel_crtc->atomic.update_wm)
+ 	if (intel_crtc->atomic.update_wm_pre)
  		intel_update_watermarks(crtc);
  
  	intel_runtime_pm_get(dev_priv);

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/intel_ringbuffer.h

between commit:

  ee412ecc74c4 ("drm/i915: Snapshot seqno of most recently submitted request.")

from the drm-intel-fixes tree and commit:

  bccca494f75c ("drm/i915: Remove the now obsolete 'outstanding_lazy_request'")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_ringbuffer.h
index 4be66f60504d,0ea89ea30182..000000000000
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@@ -271,17 -292,6 +292,13 @@@ struct  intel_engine_cs 
  	 */
  	struct list_head request_list;
  
 +	/**
- 	 * Do we have some not yet emitted requests outstanding?
- 	 */
- 	struct drm_i915_gem_request *outstanding_lazy_request;
- 	/**
 +	 * Seqno of request most recently submitted to request_list.
 +	 * Used exclusively by hang checker to avoid grabbing lock while
 +	 * inspecting request list.
 +	 */
 +	u32 last_submitted_seqno;
 +
  	bool gpu_caches_dirty;
  
  	wait_queue_head_t irq_queue;

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/i915_drv.h

between commit:

  8146ba1637a7 ("drm/i915: Store device pointer in contexts for late tracepoint usafe")

from the drm-intel-fixes tree and commit:

  b1b38278e12b ("drm/i915: add a context parameter to {en, dis}able zero address mapping")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/i915_drv.h
index 580762001f31,52d07fbd9cc8..000000000000
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@@ -826,7 -866,7 +866,8 @@@ struct intel_context 
  	struct kref ref;
  	int user_handle;
  	uint8_t remap_slice;
 +	struct drm_i915_private *i915;
+ 	int flags;
  	struct drm_i915_file_private *file_priv;
  	struct i915_ctx_hang_stats hang_stats;
  	struct i915_hw_ppgtt *ppgtt;

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_drv.h between commit b3a38998f042 ("drm/i915:
Fix a use after free, and unbalanced refcounting") from the
drm-intel-fixes tree and commit 98e1bd4ae68e ("drm/i915: Cache ringbuf
pointer in request structure") from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/i915_drv.h
index 8727086cf48c,239a382c8b55..000000000000
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@@ -2140,17 -2156,9 +2159,18 @@@ struct drm_i915_gem_request 
  	/** Position in the ringbuffer of the end of the whole request */
  	u32 tail;
  
 -	/** Context and ring buffer related to this request */
 +	/**
- 	 * Context related to this request
++	 * Context and ring buffer related to this request
 +	 * Contexts are refcounted, so when this request is associated with a
 +	 * context, we must increment the context's refcount, to guarantee that
 +	 * it persists while any request is linked to it. Requests themselves
 +	 * are also refcounted, so the request will only be freed when the last
 +	 * reference to it is dismissed, and the code in
 +	 * i915_gem_request_free() will then decrement the refcount on the
 +	 * context.
 +	 */
  	struct intel_context *ctx;
+ 	struct intel_ringbuffer *ringbuf;
  
  	/** Batch buffer related to this request if any */
  	struct drm_i915_gem_object *batch_obj;

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_display.c between commit 62e537f8d568
("drm/i915: Fix frontbuffer false positve") from the drm-intel-fixes
tree and commit 6a418fcd84d6 ("drm/i915: Use fb modifiers in
intel_check_cursor_plane") from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_display.c
index 3117679299a6,2ac93909cfc5..000000000000
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -2371,11 -2376,8 +2376,12 @@@ intel_alloc_plane_obj(struct intel_crt
  	struct drm_device *dev = crtc->base.dev;
  	struct drm_i915_gem_object *obj = NULL;
  	struct drm_mode_fb_cmd2 mode_cmd = { 0 };
+ 	struct drm_framebuffer *fb = &plane_config->fb->base;
 -	u32 base = plane_config->base;
 +	u32 base_aligned = round_down(plane_config->base, PAGE_SIZE);
 +	u32 size_aligned = round_up(plane_config->base + plane_config->size,
 +				    PAGE_SIZE);
 +
 +	size_aligned -= base_aligned;
  
  	if (plane_config->size == 0)
  		return false;
@@@ -6640,9 -6678,10 +6693,10 @@@ i9xx_get_initial_plane_config(struct in
  	fb->pitches[0] = val & 0xffffffc0;
  
  	aligned_height = intel_fb_align_height(dev, fb->height,
- 					       plane_config->tiling);
+ 					       fb->pixel_format,
+ 					       fb->modifier[0]);
  
 -	plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
 +	plane_config->size = fb->pitches[0] * aligned_height;
  
  	DRM_DEBUG_KMS("pipe/plane %c/%d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
  		      pipe_name(pipe), plane, fb->width, fb->height,
@@@ -7677,9 -7721,10 +7736,10 @@@ skylake_get_initial_plane_config(struc
  	fb->pitches[0] = (val & 0x3ff) * stride_mult;
  
  	aligned_height = intel_fb_align_height(dev, fb->height,
- 					       plane_config->tiling);
+ 					       fb->pixel_format,
+ 					       fb->modifier[0]);
  
 -	plane_config->size = ALIGN(fb->pitches[0] * aligned_height, PAGE_SIZE);
 +	plane_config->size = fb->pitches[0] * aligned_height;
  
  	DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
  		      pipe_name(pipe), fb->width, fb->height,
@@@ -7768,9 -7818,10 +7833,10 @@@ ironlake_get_initial_plane_config(struc
  	fb->pitches[0] = val & 0xffffffc0;
  
  	aligned_height = intel_fb_align_height(dev, fb->height,
- 					       plane_config->tiling);
+ 					       fb->pixel_format,
+ 					       fb->modifier[0]);
  
 -	plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
 +	plane_config->size = fb->pitches[0] * aligned_height;
  
  	DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
  		      pipe_name(pipe), fb->width, fb->height,
@@@ -12197,9 -12188,10 +12203,7 @@@ intel_check_cursor_plane(struct drm_pla
  		return -ENOMEM;
  	}
  
- 	/* we only need to pin inside GTT if cursor is non-phy */
- 	mutex_lock(&dev->struct_mutex);
- 	if (!INTEL_INFO(dev)->cursor_needs_physical && obj->tiling_mode) {
 -	if (fb == crtc->cursor->fb)
 -		return 0;
 -
+ 	if (fb->modifier[0] != DRM_FORMAT_MOD_NONE) {
  		DRM_DEBUG_KMS("cursor cannot be tiled\n");
  		ret = -EINVAL;
  	}

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_display.c between commit f37b5c2be897
("drm/i915: Align initial plane backing objects correctly") from the
drm-intel-fixes tree and commit 6bf129df6ffa ("drm/i915: Use an
intermediate variable to avoid repeating ourselves") from the drm-intel
tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_display.c
index bf19a5cce4a8,2ac93909cfc5..000000000000
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -2371,11 -2376,8 +2376,12 @@@ intel_alloc_plane_obj(struct intel_crt
  	struct drm_device *dev = crtc->base.dev;
  	struct drm_i915_gem_object *obj = NULL;
  	struct drm_mode_fb_cmd2 mode_cmd = { 0 };
+ 	struct drm_framebuffer *fb = &plane_config->fb->base;
 -	u32 base = plane_config->base;
 +	u32 base_aligned = round_down(plane_config->base, PAGE_SIZE);
 +	u32 size_aligned = round_up(plane_config->base + plane_config->size,
 +				    PAGE_SIZE);
 +
 +	size_aligned -= base_aligned;
  
  	if (plane_config->size == 0)
  		return false;
@@@ -6640,9 -6678,10 +6693,10 @@@ i9xx_get_initial_plane_config(struct in
  	fb->pitches[0] = val & 0xffffffc0;
  
  	aligned_height = intel_fb_align_height(dev, fb->height,
- 					       plane_config->tiling);
+ 					       fb->pixel_format,
+ 					       fb->modifier[0]);
  
 -	plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
 +	plane_config->size = fb->pitches[0] * aligned_height;
  
  	DRM_DEBUG_KMS("pipe/plane %c/%d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
  		      pipe_name(pipe), plane, fb->width, fb->height,
@@@ -7677,9 -7721,10 +7736,10 @@@ skylake_get_initial_plane_config(struc
  	fb->pitches[0] = (val & 0x3ff) * stride_mult;
  
  	aligned_height = intel_fb_align_height(dev, fb->height,
- 					       plane_config->tiling);
+ 					       fb->pixel_format,
+ 					       fb->modifier[0]);
  
 -	plane_config->size = ALIGN(fb->pitches[0] * aligned_height, PAGE_SIZE);
 +	plane_config->size = fb->pitches[0] * aligned_height;
  
  	DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
  		      pipe_name(pipe), fb->width, fb->height,
@@@ -7768,9 -7818,10 +7833,10 @@@ ironlake_get_initial_plane_config(struc
  	fb->pitches[0] = val & 0xffffffc0;
  
  	aligned_height = intel_fb_align_height(dev, fb->height,
- 					       plane_config->tiling);
+ 					       fb->pixel_format,
+ 					       fb->modifier[0]);
  
 -	plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
 +	plane_config->size = fb->pitches[0] * aligned_height;
  
  	DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
  		      pipe_name(pipe), fb->width, fb->height,

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_runtime_pm.c between commit 7f1241ed1a06
("drm/i915: Kill check_power_well() calls") from the drm-intel-fixes
tree and commit e2c719b75c8c ("drm/i915: tame the chattermouth (v2)")
from the drm-intel tree.

I fixed it up (the former removed the code modified by the latter) and
can carry the fix as necessary (no action is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_drv.h between commit f93e94efebbe ("drm/i915:
Fix dynamic allocation of physical handles") from the drm-intel-fixes
tree and commit 5cc9ed4b9a7a ("drm/i915: Introduce mapping of user
pages into video memory (userptr) ioctl") from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/i915_drv.h
index d6dc54aa123a,d2da390b6b9f..000000000000
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@@ -1609,9 -1712,21 +1697,21 @@@ struct drm_i915_gem_object 
  	struct drm_file *pin_filp;
  
  	/** for phy allocated objects */
 -	struct drm_i915_gem_phys_object *phys_obj;
 +	drm_dma_handle_t *phys_handle;
- };
  
+ 	union {
+ 		struct i915_gem_userptr {
+ 			uintptr_t ptr;
+ 			unsigned read_only :1;
+ 			unsigned workers :4;
+ #define I915_GEM_USERPTR_MAX_WORKERS 15
+ 
+ 			struct mm_struct *mm;
+ 			struct i915_mmu_object *mn;
+ 			struct work_struct *work;
+ 		} userptr;
+ 	};
+ };
  #define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)
  
  /**

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_gem_gtt.c between commitcfa7c862982b
("drm/i915: Sanitize the enable_ppgtt module option once") from the
drm-intel-fixes tree tree and commit 5db6c735ead5 ("drm/i915: dmesg
output for VT-d testing") from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/i915_gem_gtt.c
index 154b0f8bb88d,496916298e8a..000000000000
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@@ -62,62 -48,13 +62,9 @@@ static int sanitize_enable_ppgtt(struc
  	}
  #endif
  
 -	/* Full ppgtt disabled by default for now due to issues. */
 -	if (full)
 -		return HAS_PPGTT(dev) && (i915.enable_ppgtt == 2);
 -	else
 -		return HAS_ALIASING_PPGTT(dev);
 +	return HAS_ALIASING_PPGTT(dev) ? 1 : 0;
  }
  
- #define GEN6_PPGTT_PD_ENTRIES 512
- #define I915_PPGTT_PT_ENTRIES (PAGE_SIZE / sizeof(gen6_gtt_pte_t))
- typedef uint64_t gen8_gtt_pte_t;
- typedef gen8_gtt_pte_t gen8_ppgtt_pde_t;
- 
- /* PPGTT stuff */
- #define GEN6_GTT_ADDR_ENCODE(addr)	((addr) | (((addr) >> 28) & 0xff0))
- #define HSW_GTT_ADDR_ENCODE(addr)	((addr) | (((addr) >> 28) & 0x7f0))
- 
- #define GEN6_PDE_VALID			(1 << 0)
- /* gen6+ has bit 11-4 for physical addr bit 39-32 */
- #define GEN6_PDE_ADDR_ENCODE(addr)	GEN6_GTT_ADDR_ENCODE(addr)
- 
- #define GEN6_PTE_VALID			(1 << 0)
- #define GEN6_PTE_UNCACHED		(1 << 1)
- #define HSW_PTE_UNCACHED		(0)
- #define GEN6_PTE_CACHE_LLC		(2 << 1)
- #define GEN7_PTE_CACHE_L3_LLC		(3 << 1)
- #define GEN6_PTE_ADDR_ENCODE(addr)	GEN6_GTT_ADDR_ENCODE(addr)
- #define HSW_PTE_ADDR_ENCODE(addr)	HSW_GTT_ADDR_ENCODE(addr)
- 
- /* Cacheability Control is a 4-bit value. The low three bits are stored in *
-  * bits 3:1 of the PTE, while the fourth bit is stored in bit 11 of the PTE.
-  */
- #define HSW_CACHEABILITY_CONTROL(bits)	((((bits) & 0x7) << 1) | \
- 					 (((bits) & 0x8) << (11 - 3)))
- #define HSW_WB_LLC_AGE3			HSW_CACHEABILITY_CONTROL(0x2)
- #define HSW_WB_LLC_AGE0			HSW_CACHEABILITY_CONTROL(0x3)
- #define HSW_WB_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0xb)
- #define HSW_WB_ELLC_LLC_AGE3		HSW_CACHEABILITY_CONTROL(0x8)
- #define HSW_WT_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0x6)
- #define HSW_WT_ELLC_LLC_AGE3		HSW_CACHEABILITY_CONTROL(0x7)
- 
- #define GEN8_PTES_PER_PAGE		(PAGE_SIZE / sizeof(gen8_gtt_pte_t))
- #define GEN8_PDES_PER_PAGE		(PAGE_SIZE / sizeof(gen8_ppgtt_pde_t))
- 
- /* GEN8 legacy style addressis defined as a 3 level page table:
-  * 31:30 | 29:21 | 20:12 |  11:0
-  * PDPE  |  PDE  |  PTE  | offset
-  * The difference as compared to normal x86 3 level page table is the PDPEs are
-  * programmed via register.
-  */
- #define GEN8_PDPE_SHIFT			30
- #define GEN8_PDPE_MASK			0x3
- #define GEN8_PDE_SHIFT			21
- #define GEN8_PDE_MASK			0x1ff
- #define GEN8_PTE_SHIFT			12
- #define GEN8_PTE_MASK			0x1ff
- 
- #define PPAT_UNCACHED_INDEX		(_PAGE_PWT | _PAGE_PCD)
- #define PPAT_CACHED_PDE_INDEX		0 /* WB LLC */
- #define PPAT_CACHED_INDEX		_PAGE_PAT /* WB LLCeLLC */
- #define PPAT_DISPLAY_ELLC_INDEX		_PAGE_PCD /* WT eLLC */
  
  static void ppgtt_bind_vma(struct i915_vma *vma,
  			   enum i915_cache_level cache_level,
@@@ -2041,14 -1971,10 +1981,18 @@@ int i915_gem_gtt_init(struct drm_devic
  		 gtt->base.total >> 20);
  	DRM_DEBUG_DRIVER("GMADR size = %ldM\n", gtt->mappable_end >> 20);
  	DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n", gtt->stolen_size >> 20);
 +	/*
 +	 * i915.enable_ppgtt is read-only, so do an early pass to validate the
 +	 * user's requested state against the hardware/driver capabilities.  We
 +	 * do this now so that we can print out any log messages once rather
 +	 * than every time we check intel_enable_ppgtt().
 +	 */
 +	i915.enable_ppgtt = sanitize_enable_ppgtt(dev, i915.enable_ppgtt);
 +	DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915.enable_ppgtt);
+ #ifdef CONFIG_INTEL_IOMMU
+ 	if (intel_iommu_gfx_mapped)
+ 		DRM_INFO("VT-d active for gfx access\n");
+ #endif
  
  	return 0;
  }

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_pm.c between commit be3d26b0588c ("drm/i915:
get a PC8 reference when enabling the power well") from the
drm-intel-fixes tree and commit c1ca727f8945 ("drm/i915: support for
multiple power wells") from the drm-intel tree.

I fixed it up (the drm-intel-fixes tree patch also appears in the
drm-intel so I just use the drm-intel tree version of this file) and can
carry the fix as necessary (no action is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

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Re: linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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On Mon, 2 Dec 2013 12:04:37 +1100 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Today's linux-next merge of the drm-intel tree got a conflict in
> drivers/gpu/drm/i915/intel_display.c between commit a1216444283e
> ("drm/i915: use the correct force_wake function at the PC8 code") from
> the drm-intel-fixes tree and commit c8d9a5905e45 ("drm/i915: Add power
> well arguments to force wake routines") from the drm-intel tree.
> 
> I fixed it up (I just used the drm-intel-fixes version) and can carry the
> fix as necessary (no action is required).

Actually, I ended up doing the below.

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_display.c
index 080f6fd4e839,0332d7ca892d..000000000000
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -6402,7 -6583,7 +6583,7 @@@ static void hsw_restore_lcpll(struct dr
  
  	/* Make sure we're not on PC8 state before disabling PC8, otherwise
  	 * we'll hang the machine! */
- 	gen6_gt_force_wake_get(dev_priv);
 -	dev_priv->uncore.funcs.force_wake_get(dev_priv, FORCEWAKE_ALL);
++	gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
  
  	if (val & LCPLL_POWER_DOWN_ALLOW) {
  		val &= ~LCPLL_POWER_DOWN_ALLOW;
@@@ -6436,7 -6617,7 +6617,7 @@@
  			DRM_ERROR("Switching back to LCPLL failed\n");
  	}
  
- 	gen6_gt_force_wake_put(dev_priv);
 -	dev_priv->uncore.funcs.force_wake_put(dev_priv, FORCEWAKE_ALL);
++	gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
  }
  
  void hsw_enable_pc8_work(struct work_struct *__work)

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_display.c between commit a1216444283e
("drm/i915: use the correct force_wake function at the PC8 code") from
the drm-intel-fixes tree and commit c8d9a5905e45 ("drm/i915: Add power
well arguments to force wake routines") from the drm-intel tree.

I fixed it up (I just used the drm-intel-fixes version) and can carry the
fix as necessary (no action is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_display.c between commit 67c72a122541
("drm/i915: preserve pipe A quirk in i9xx_set_pipeconf") from the
drm-intel-fixes tree and commit cf532bb25592 ("drm/i915: Move double wide
mode handling into pipe_config") from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_display.c
index e5822e7,d12d563..0000000
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -4775,21 -4881,8 +4881,12 @@@ static void i9xx_set_pipeconf(struct in
  
  	pipeconf = 0;
  
 +	if (dev_priv->quirks & QUIRK_PIPEA_FORCE &&
 +	    I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE)
 +		pipeconf |= PIPECONF_ENABLE;
 +
- 	if (intel_crtc->pipe == 0 && INTEL_INFO(dev)->gen < 4) {
- 		/* Enable pixel doubling when the dot clock is > 90% of the (display)
- 		 * core speed.
- 		 *
- 		 * XXX: No double-wide on 915GM pipe B. Is that the only reason for the
- 		 * pipe == 0 check?
- 		 */
- 		if (intel_crtc->config.requested_mode.clock >
- 		    dev_priv->display.get_display_clock_speed(dev) * 9 / 10)
- 			pipeconf |= PIPECONF_DOUBLE_WIDE;
- 	}
+ 	if (intel_crtc->config.double_wide)
+ 		pipeconf |= PIPECONF_DOUBLE_WIDE;
  
  	/* only g4x and later have fancy bpc/dither controls */
  	if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

[-- Attachment #1: Type: text/plain, Size: 3017 bytes --]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_display.c between commit cc173961a680
("drm/i915: do not update cursor in crtc mode set") from the
drm-intel-fixes tree and commit e9fd1c02aca7 ("drm/i915: don't enable
DPLL for DSI") from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_display.c
index d8a1d98,2ed974e..0000000
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -4863,21 -4915,27 +4915,24 @@@ static int i9xx_crtc_mode_set(struct dr
  
  	refclk = i9xx_get_refclk(crtc, num_connectors);
  
- 	/*
- 	 * Returns a set of divisors for the desired target clock with the given
- 	 * refclk, or FALSE.  The returned values represent the clock equation:
- 	 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
- 	 */
- 	limit = intel_limit(crtc, refclk);
- 	ok = dev_priv->display.find_dpll(limit, crtc,
- 					 intel_crtc->config.port_clock,
- 					 refclk, NULL, &clock);
- 	if (!ok && !intel_crtc->config.clock_set) {
- 		DRM_ERROR("Couldn't find PLL settings for mode!\n");
- 		return -EINVAL;
+ 	if (!is_dsi && !intel_crtc->config.clock_set) {
+ 		/*
+ 		 * Returns a set of divisors for the desired target clock with
+ 		 * the given refclk, or FALSE.  The returned values represent
+ 		 * the clock equation: reflck * (5 * (m1 + 2) + (m2 + 2)) / (n +
+ 		 * 2) / p1 / p2.
+ 		 */
+ 		limit = intel_limit(crtc, refclk);
+ 		ok = dev_priv->display.find_dpll(limit, crtc,
+ 						 intel_crtc->config.port_clock,
+ 						 refclk, NULL, &clock);
+ 		if (!ok && !intel_crtc->config.clock_set) {
+ 			DRM_ERROR("Couldn't find PLL settings for mode!\n");
+ 			return -EINVAL;
+ 		}
  	}
  
- 	if (is_lvds && dev_priv->lvds_downclock_avail) {
 -	/* Ensure that the cursor is valid for the new mode before changing... */
 -	intel_crtc_update_cursor(crtc, true);
 -
+ 	if (!is_dsi && is_lvds && dev_priv->lvds_downclock_avail) {
  		/*
  		 * Ensure we match the reduced clock's P to the target clock.
  		 * If the clocks don't match, we can't switch the display clock
@@@ -8199,11 -8377,11 +8371,12 @@@ static void intel_dump_pipe_config(stru
  		      pipe_config->gmch_pfit.control,
  		      pipe_config->gmch_pfit.pgm_ratios,
  		      pipe_config->gmch_pfit.lvds_border_bits);
 -	DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x\n",
 +	DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x, %s\n",
  		      pipe_config->pch_pfit.pos,
 -		      pipe_config->pch_pfit.size);
 +		      pipe_config->pch_pfit.size,
 +		      pipe_config->pch_pfit.enabled ? "enabled" : "disabled");
  	DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
+ 	DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
  }
  
  static bool check_encoder_cloning(struct drm_crtc *crtc)

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_pm.c between commit 14c5cec5d0cd ("drm/i915:
initialize gt_lock early with other spin locks") from the drm-intel-fixes
tree and commit 907b28c56ea4 ("drm/i915: Colocate all GT access routines
in the same file") from the drm-intel tree.

I fixed it up (using the drm-intel tree version) and can carry the fix as
necessary (no action is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

[-- Attachment #1: Type: text/plain, Size: 531 bytes --]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_dma.c between commit 14c5cec5d0cd ("drm/i915:
initialize gt_lock early with other spin locks") from the drm-intel-fixes
tree and commit 907b28c56ea4 ("drm/i915: Colocate all GT access routines
in the same file") from the drm-intel tree.

I fixed it up (using the drm-intel tree version) and can carry the fix as
necessary (no action is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_gem.c between commit 067556084a0e ("drm/i915:
Correct obj->mm_list link to dev_priv->dev_priv->mm.inactive_list") from
the drm-intel-fixes tree and commit 5cef07e16283 ("drm/i915: Move
active/inactive lists to new mm") from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/i915_gem.c
index 97afd26,9a523df..0000000
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@@ -2275,14 -2282,11 +2276,10 @@@ void i915_gem_reset(struct drm_device *
  	/* Move everything out of the GPU domains to ensure we do any
  	 * necessary invalidation upon reuse.
  	 */
- 	list_for_each_entry(obj,
- 			    &dev_priv->mm.inactive_list,
- 			    mm_list)
- 	{
+ 	list_for_each_entry(obj, &vm->inactive_list, mm_list)
  		obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
- 	}
  
 -	/* The fence registers are invalidated so clear them out */
 -	i915_gem_reset_fences(dev);
 +	i915_gem_restore_fences(dev);
  }
  
  /**
@@@ -2666,27 -2679,12 +2671,27 @@@ static void i965_write_fence_reg(struc
  		fence_pitch_shift = I965_FENCE_PITCH_SHIFT;
  	}
  
 +	fence_reg += reg * 8;
 +
 +	/* To w/a incoherency with non-atomic 64-bit register updates,
 +	 * we split the 64-bit update into two 32-bit writes. In order
 +	 * for a partial fence not to be evaluated between writes, we
 +	 * precede the update with write to turn off the fence register,
 +	 * and only enable the fence as the last step.
 +	 *
 +	 * For extra levels of paranoia, we make sure each step lands
 +	 * before applying the next step.
 +	 */
 +	I915_WRITE(fence_reg, 0);
 +	POSTING_READ(fence_reg);
 +
  	if (obj) {
- 		u32 size = obj->gtt_space->size;
+ 		u32 size = i915_gem_obj_ggtt_size(obj);
 +		uint64_t val;
  
- 		val = (uint64_t)((obj->gtt_offset + size - 4096) &
+ 		val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) &
  				 0xfffff000) << 32;
- 		val |= obj->gtt_offset & 0xfffff000;
+ 		val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000;
  		val |= (uint64_t)((obj->stride / 128) - 1) << fence_pitch_shift;
  		if (obj->tiling_mode == I915_TILING_Y)
  			val |= 1 << I965_FENCE_TILING_Y_SHIFT;
@@@ -3992,11 -4050,8 +4022,6 @@@ i915_gem_idle(struct drm_device *dev
  	if (!drm_core_check_feature(dev, DRIVER_MODESET))
  		i915_gem_evict_everything(dev);
  
- 	/* Hack!  Don't let anybody do execbuf while we don't control the chip.
- 	 * We need to replace this with a semaphore, or something.
- 	 * And not confound mm.suspended!
- 	 */
- 	dev_priv->mm.suspended = 1;
 -	i915_gem_reset_fences(dev);
 -
  	del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
  
  	i915_kernel_lost_context(dev);
@@@ -4594,7 -4664,7 +4635,7 @@@ i915_gem_inactive_shrink(struct shrinke
  	list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list)
  		if (obj->pages_pin_count == 0)
  			cnt += obj->base.size >> PAGE_SHIFT;
- 	list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list)
 -	list_for_each_entry(obj, &vm->inactive_list, global_list)
++	list_for_each_entry(obj, &vm->inactive_list, mm_list)
  		if (obj->pin_count == 0 && obj->pages_pin_count == 0)
  			cnt += obj->base.size >> PAGE_SHIFT;
  

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_dma.c between commit 7dcd2677ea91 ("drm/i915:
fix long-standing SNB regression in power consumption after resume v2")
from the drm-intel-fixes tree and commit 59cdb63d529c ("drm/i915: kill
dev_priv->rps.lock") from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/i915_dma.c
index 095e3db,fd52de7..0000000
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@@ -1495,16 -1490,12 +1490,19 @@@ int i915_driver_load(struct drm_device 
  	dev_priv->dev = dev;
  	dev_priv->info = info;
  
 +	spin_lock_init(&dev_priv->irq_lock);
 +	spin_lock_init(&dev_priv->gpu_error.lock);
- 	spin_lock_init(&dev_priv->rps.lock);
 +	spin_lock_init(&dev_priv->backlight.lock);
 +	mutex_init(&dev_priv->dpio_lock);
 +	mutex_init(&dev_priv->rps.hw_lock);
 +	mutex_init(&dev_priv->modeset_restore_lock);
 +
  	i915_dump_device_info(dev_priv);
  
+ 	INIT_LIST_HEAD(&dev_priv->vm_list);
+ 	INIT_LIST_HEAD(&dev_priv->gtt.base.global_link);
+ 	list_add(&dev_priv->gtt.base.global_link, &dev_priv->vm_list);
+ 
  	if (i915_get_bridge_dev(dev)) {
  		ret = -EIO;
  		goto free_priv;

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linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Stephen Rothwell]

[-- Attachment #1: Type: text/plain, Size: 2537 bytes --]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_gem.c between commits 19b2dbde5732
("drm/i915: Restore fences after resume and GPU resets") from Linus' tree
and d18b96190342 ("drm/i915: Fix incoherence with fence updates on
Sandybridge+") from the drm-intel-fixes tree and commits f343c5f64773
("drm/i915: Getter/setter for object attributes") and db1b76ca6a79
("drm/i915: don't frob mm.suspended when not using ums") from the
drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/i915_gem.c
index 97afd26,20b10a0..0000000
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@@ -2666,27 -2673,12 +2665,27 @@@ static void i965_write_fence_reg(struc
  		fence_pitch_shift = I965_FENCE_PITCH_SHIFT;
  	}
  
 +	fence_reg += reg * 8;
 +
 +	/* To w/a incoherency with non-atomic 64-bit register updates,
 +	 * we split the 64-bit update into two 32-bit writes. In order
 +	 * for a partial fence not to be evaluated between writes, we
 +	 * precede the update with write to turn off the fence register,
 +	 * and only enable the fence as the last step.
 +	 *
 +	 * For extra levels of paranoia, we make sure each step lands
 +	 * before applying the next step.
 +	 */
 +	I915_WRITE(fence_reg, 0);
 +	POSTING_READ(fence_reg);
 +
  	if (obj) {
- 		u32 size = obj->gtt_space->size;
+ 		u32 size = i915_gem_obj_ggtt_size(obj);
 +		uint64_t val;
  
- 		val = (uint64_t)((obj->gtt_offset + size - 4096) &
+ 		val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) &
  				 0xfffff000) << 32;
- 		val |= obj->gtt_offset & 0xfffff000;
+ 		val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000;
  		val |= (uint64_t)((obj->stride / 128) - 1) << fence_pitch_shift;
  		if (obj->tiling_mode == I915_TILING_Y)
  			val |= 1 << I965_FENCE_TILING_Y_SHIFT;
@@@ -3992,11 -4008,8 +3980,6 @@@ i915_gem_idle(struct drm_device *dev
  	if (!drm_core_check_feature(dev, DRIVER_MODESET))
  		i915_gem_evict_everything(dev);
  
- 	/* Hack!  Don't let anybody do execbuf while we don't control the chip.
- 	 * We need to replace this with a semaphore, or something.
- 	 * And not confound mm.suspended!
- 	 */
- 	dev_priv->mm.suspended = 1;
 -	i915_gem_reset_fences(dev);
 -
  	del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
  
  	i915_kernel_lost_context(dev);

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