From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v1 4/4] clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock
Date: Tue, 3 Aug 2021 01:13:36 +0300 [thread overview]
Message-ID: <20210802221336.32016-5-digetx@gmail.com> (raw)
In-Reply-To: <20210802221336.32016-1-digetx@gmail.com>
FUSE driver now takes care of keeping the clock enabled when necessary.
Remove the CLK_IS_CRITICAL flag from the clock.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/clk/tegra/clk-tegra-periph.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index 292d6269daf1..4dcf7f7cb8a0 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -777,11 +777,7 @@ static struct tegra_periph_init_data gate_clks[] = {
GATE("ahbdma", "hclk", 33, 0, tegra_clk_ahbdma, 0),
GATE("apbdma", "pclk", 34, 0, tegra_clk_apbdma, 0),
GATE("kbc", "clk_32k", 36, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, tegra_clk_kbc, 0),
- /*
- * Critical for RAM re-repair operation, which must occur on resume
- * from LP1 system suspend and as part of CCPLEX cluster switching.
- */
- GATE("fuse", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse, CLK_IS_CRITICAL),
+ GATE("fuse", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse, 0),
GATE("fuse_burn", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse_burn, 0),
GATE("kfuse", "clk_m", 40, TEGRA_PERIPH_ON_APB, tegra_clk_kfuse, 0),
GATE("apbif", "clk_m", 107, TEGRA_PERIPH_ON_APB, tegra_clk_apbif, 0),
--
2.32.0
next prev parent reply other threads:[~2021-08-02 22:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-02 22:13 [PATCH v1 0/4] Tegra FUSE clock improvements for 5.15 Dmitry Osipenko
2021-08-02 22:13 ` [PATCH v1 1/4] soc/tegra: fuse: Clear fuse->clk on driver probe failure Dmitry Osipenko
2021-08-02 22:13 ` [PATCH v1 2/4] soc/tegra: fuse: Add runtime PM support Dmitry Osipenko
2021-08-02 22:13 ` [PATCH v1 3/4] soc/tegra: fuse: Enable fuse clock on suspend for Tegra124 Dmitry Osipenko
2021-08-02 22:13 ` Dmitry Osipenko [this message]
2021-08-11 9:58 ` [PATCH v1 4/4] clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock Thierry Reding
2021-08-11 9:57 ` [PATCH v1 0/4] Tegra FUSE clock improvements for 5.15 Thierry Reding
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210802221336.32016-5-digetx@gmail.com \
--to=digetx@gmail.com \
--cc=jonathanh@nvidia.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=pdeschrijver@nvidia.com \
--cc=pgaikwad@nvidia.com \
--cc=sboyd@kernel.org \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).