From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B657C432BE for ; Fri, 6 Aug 2021 07:44:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 49D7E60F38 for ; Fri, 6 Aug 2021 07:44:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237995AbhHFHpE (ORCPT ); Fri, 6 Aug 2021 03:45:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49524 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230513AbhHFHpC (ORCPT ); Fri, 6 Aug 2021 03:45:02 -0400 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5640C061799 for ; Fri, 6 Aug 2021 00:44:46 -0700 (PDT) Received: by mail-pj1-x1031.google.com with SMTP id u13-20020a17090abb0db0290177e1d9b3f7so21384898pjr.1 for ; Fri, 06 Aug 2021 00:44:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=HLoPc1uP3W6cbVHev0+XuSTJyiY+fEhdaCUYmE93+kk=; b=lYq4fiRmC6kteclmEVNZkBsF97AjsC+PJ746EbB3Go9ITSt+2udR5j/biuCNZslSig MmarzGrN1NNnBIik/E0K/VvTY7qsX0372b34O8qnHvdH6e1uXaFKuXJT/sBYzWm+eb+u xper1W4OpmKO6de7oMVBdZFghgF/cuODS4ofnHoVwe1rdGCMRQOvRqxPmhvqlQhJq/bg Mqt7GIbkSDSsRgs3bD4qOE6xqhKxGLVSe6Ke+VM0cqkQPBHCuuBzVU5wVzczj8OmD/Fx xZskcIVspC963xU3EhiF5yUsUI8AiR8rTbM07FX6TR5sYm/UMglvpUUKGNW8Q3T9qbQT hQEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=HLoPc1uP3W6cbVHev0+XuSTJyiY+fEhdaCUYmE93+kk=; b=hsDbQZ6U2Fk5O3bWJO7NIbfk9NkZOYktybd3IO7Vf5NngkE/PPUdoj3zQZUetb6D07 uOcRBsYU7xneVc25MQ0hD+Q6DJBAyoMS6f+RXlsFdUFi8/ScgLmvXRsDm2i863x+EOUM Lw3t2/Mc9s/RpyYj6T2EEeOw50yNs+yDptzYxuTULqs/LeJh3DG6rjwBeg2/PgtODPd+ SJumS8aQA4QyKCWvbcJxbf7pemHWWqQ/jIGLw+jVLQ7fChFv2mB6y0tn8GyUfV67bsvR VNB1PWRRyev3p6JMTk1JU1tLOIJ/fkAkQvsLXGDhqonSBnfPQFYm+QNufeME292RYlNs fzBg== X-Gm-Message-State: AOAM53296EFB4O2mv3noc4X5bI26n6oNBCDxZ1zr7mW5xOc4gONAXtoE 7PbDwPPuoDFCd8+QAOu3ZmeHfw== X-Google-Smtp-Source: ABdhPJyrfoYXeQrSbRRrPna+3iA3J7eBpuiUp18COesHdOnPDAz3eag54rg83K3WYN0xnCE3R1HYnw== X-Received: by 2002:a17:902:b282:b029:12c:4ce3:8852 with SMTP id u2-20020a170902b282b029012c4ce38852mr7566606plr.31.1628235886440; Fri, 06 Aug 2021 00:44:46 -0700 (PDT) Received: from localhost ([122.172.201.85]) by smtp.gmail.com with ESMTPSA id w2sm8099623pjq.5.2021.08.06.00.44.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Aug 2021 00:44:45 -0700 (PDT) Date: Fri, 6 Aug 2021 13:14:44 +0530 From: Viresh Kumar To: Arnd Bergmann Cc: "Michael S. Tsirkin" , Viresh Kumar , Linus Walleij , Cornelia Huck , Linux Kernel Mailing List , "open list:DRM DRIVER FOR QEMU'S CIRRUS DEVICE" , Bartosz Golaszewski , Geert Uytterhoeven , "open list:GPIO SUBSYSTEM" , Marc Zyngier , Thomas Gleixner , Stratos Mailing List , "Enrico Weigelt, metux IT consult" , Jason Wang Subject: Re: [Stratos-dev] [PATCH V4 2/2] gpio: virtio: Add IRQ support Message-ID: <20210806074444.zsxwb2pmgjcq2dl2@vireshk-i7> References: <75c8e6e5e8dfa1889938f3a6b2d991763c7a3717.1627989586.git.viresh.kumar@linaro.org> <0100017b1610f711-c53c79f2-9e28-4c45-bb42-8db09688b18e-000000@email.amazonses.com> <20210805124922.j7lts7tfmm4t2kpf@vireshk-i7> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180716-391-311a52 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05-08-21, 15:10, Arnd Bergmann wrote: > I hope this can still be simplified by working out better which state > transitions are needed exactly. In particular, I would expect that we > can get away with not sending a VIRTIO_GPIO_MSG_IRQ_TYPE > for 'mask' state changes at all, but use that only for forcing 'enabled' > state changes. Something like this ? struct vgpio_irq_line { u8 type; bool masked; bool update_pending; bool queued; struct virtio_gpio_irq_request ireq ____cacheline_aligned; struct virtio_gpio_irq_response ires ____cacheline_aligned; }; static void virtio_gpio_irq_disable(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct virtio_gpio *vgpio = gpiochip_get_data(gc); struct vgpio_irq_line *irq_line = &vgpio->irq_lines[d->hwirq]; irq_line->masked = true; irq_line->update_pending = true; } static void virtio_gpio_irq_enable(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct virtio_gpio *vgpio = gpiochip_get_data(gc); struct vgpio_irq_line *irq_line = &vgpio->irq_lines[d->hwirq]; irq_line->masked = false; irq_line->update_pending = true; /* Queue the buffer unconditionally on enable */ virtio_gpio_irq_prepare(vgpio, d->hwirq); } static void virtio_gpio_irq_mask(struct irq_data *d) { /* Nothing to do here */ } static void virtio_gpio_irq_unmask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct virtio_gpio *vgpio = gpiochip_get_data(gc); /* Queue the buffer unconditionally on unmask */ virtio_gpio_irq_prepare(vgpio, d->hwirq); } static int virtio_gpio_irq_set_type(struct irq_data *d, unsigned int type) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct virtio_gpio *vgpio = gpiochip_get_data(gc); struct vgpio_irq_line *irq_line = &vgpio->irq_lines[d->hwirq]; switch (type) { case IRQ_TYPE_NONE: type = VIRTIO_GPIO_IRQ_TYPE_NONE; break; case IRQ_TYPE_EDGE_RISING: type = VIRTIO_GPIO_IRQ_TYPE_EDGE_RISING; break; case IRQ_TYPE_EDGE_FALLING: type = VIRTIO_GPIO_IRQ_TYPE_EDGE_FALLING; break; case IRQ_TYPE_EDGE_BOTH: type = VIRTIO_GPIO_IRQ_TYPE_EDGE_BOTH; break; case IRQ_TYPE_LEVEL_LOW: type = VIRTIO_GPIO_IRQ_TYPE_LEVEL_LOW; break; case IRQ_TYPE_LEVEL_HIGH: type = VIRTIO_GPIO_IRQ_TYPE_LEVEL_HIGH; break; default: dev_err(&vgpio->vdev->dev, "unsupported irq type: %u\n", type); return -EINVAL; } irq_line->type = type; irq_line->update_pending = true; return 0; } static void update_irq_type(struct virtio_gpio *vgpio, u16 gpio, u8 type) { virtio_gpio_req(vgpio, VIRTIO_GPIO_MSG_IRQ_TYPE, gpio, type, NULL); } static void virtio_gpio_irq_bus_lock(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct virtio_gpio *vgpio = gpiochip_get_data(gc); mutex_lock(&vgpio->irq_lock); } static void virtio_gpio_irq_bus_sync_unlock(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct virtio_gpio *vgpio = gpiochip_get_data(gc); struct vgpio_irq_line *irq_line = &vgpio->irq_lines[d->hwirq]; u8 type = irq_line->masked ? VIRTIO_GPIO_IRQ_TYPE_NONE : irq_line->type; if (irq_line->update_pending) { irq_line->update_pending = false; update_irq_type(vgpio, d->hwirq, type); } mutex_unlock(&vgpio->irq_lock); } static struct irq_chip vgpio_irq_chip = { .name = "virtio-gpio", .irq_enable = virtio_gpio_irq_enable, .irq_disable = virtio_gpio_irq_disable, .irq_mask = virtio_gpio_irq_mask, .irq_unmask = virtio_gpio_irq_unmask, .irq_set_type = virtio_gpio_irq_set_type, /* These are required to implement irqchip for slow busses */ .irq_bus_lock = virtio_gpio_irq_bus_lock, .irq_bus_sync_unlock = virtio_gpio_irq_bus_sync_unlock, }; > One part that I think is missing though is remembering the case > when an eventq message came in after an interrupt got masked > when the message was already armed. In this case, the > virtio_gpio_event_vq() function would not call the irq handler, > but the subsequent "unmask" callback would need to arrange > having it called. I will come back to this. -- viresh