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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: "Pali Rohár" <pali@kernel.org>, bhelgaas@google.com
Cc: "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Rob Herring" <robh@kernel.org>,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	"Marek Behún" <kabel@kernel.org>,
	"Remi Pommarel" <repk@triplefau.lt>, Xogium <contact@xogium.me>,
	"Tomasz Maciej Nowak" <tmn505@gmail.com>,
	"Nadav Haklai" <nadavh@marvell.com>,
	"Kostya Porotchkin" <kostap@marvell.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [RESEND PATCH 2/5] PCI: Add PCI_EXP_DEVCTL_PAYLOAD_* macros
Date: Fri, 13 Aug 2021 16:46:46 +0100	[thread overview]
Message-ID: <20210813154646.GB15515@lpieralisi> (raw)
In-Reply-To: <20210624222621.4776-3-pali@kernel.org>

On Fri, Jun 25, 2021 at 12:26:18AM +0200, Pali Rohár wrote:
> Define a macro PCI_EXP_DEVCTL_PAYLOAD_* for every possible Max Payload
> Size in linux/pci_regs.h, in the same style as PCI_EXP_DEVCTL_READRQ_*.
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> Reviewed-by: Marek Behún <kabel@kernel.org>
> ---
>  include/uapi/linux/pci_regs.h | 6 ++++++
>  1 file changed, 6 insertions(+)

I'd need Bjorn's ACK to proceed with this series.

Thanks,
Lorenzo

> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index e709ae8235e7..ff6ccbc6efe9 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -504,6 +504,12 @@
>  #define  PCI_EXP_DEVCTL_URRE	0x0008	/* Unsupported Request Reporting En. */
>  #define  PCI_EXP_DEVCTL_RELAX_EN 0x0010 /* Enable relaxed ordering */
>  #define  PCI_EXP_DEVCTL_PAYLOAD	0x00e0	/* Max_Payload_Size */
> +#define  PCI_EXP_DEVCTL_PAYLOAD_128B 0x0000 /* 128 Bytes */
> +#define  PCI_EXP_DEVCTL_PAYLOAD_256B 0x0020 /* 256 Bytes */
> +#define  PCI_EXP_DEVCTL_PAYLOAD_512B 0x0040 /* 512 Bytes */
> +#define  PCI_EXP_DEVCTL_PAYLOAD_1024B 0x0060 /* 1024 Bytes */
> +#define  PCI_EXP_DEVCTL_PAYLOAD_2048B 0x0080 /* 2048 Bytes */
> +#define  PCI_EXP_DEVCTL_PAYLOAD_4096B 0x00a0 /* 4096 Bytes */
>  #define  PCI_EXP_DEVCTL_EXT_TAG	0x0100	/* Extended Tag Field Enable */
>  #define  PCI_EXP_DEVCTL_PHANTOM	0x0200	/* Phantom Functions Enable */
>  #define  PCI_EXP_DEVCTL_AUX_PME	0x0400	/* Auxiliary Power PM Enable */
> -- 
> 2.20.1
> 

  reply	other threads:[~2021-08-13 15:46 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-24 22:26 [RESEND PATCH 0/5] PCI: aardvark: Initialization fixes Pali Rohár
2021-06-24 22:26 ` [RESEND PATCH 1/5] PCI: aardvark: Fix link training Pali Rohár
2021-06-24 22:26 ` [RESEND PATCH 2/5] PCI: Add PCI_EXP_DEVCTL_PAYLOAD_* macros Pali Rohár
2021-08-13 15:46   ` Lorenzo Pieralisi [this message]
2021-08-24 19:00   ` Bjorn Helgaas
2021-06-24 22:26 ` [RESEND PATCH 3/5] PCI: aardvark: Fix PCIe Max Payload Size setting Pali Rohár
2021-06-24 22:26 ` [RESEND PATCH 4/5] PCI: aardvark: Implement workaround for the readback value of VEND_ID Pali Rohár
2021-06-24 22:26 ` [RESEND PATCH 5/5] PCI: aardvark: Implement workaround for PCIe Completion Timeout Pali Rohár
2021-08-25 19:59   ` Pali Rohár
2021-09-08 19:42     ` Pali Rohár
2021-06-25 12:52 ` [RESEND PATCH 0/5] PCI: aardvark: Initialization fixes Lorenzo Pieralisi

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