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From: Huacai Chen <chenhuacai@loongson.cn>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Darren Hart <dvhart@infradead.org>,
	Davidlohr Bueso <dave@stgolabs.net>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
	Xuefeng Li <lixuefeng@loongson.cn>,
	Huacai Chen <chenhuacai@gmail.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Huacai Chen <chenhuacai@loongson.cn>,
	Hongchen Zhang <zhanghongchen@loongson.cn>
Subject: [PATCH] futex: Fix fault_in_user_writeable()
Date: Mon, 16 Aug 2021 14:54:17 +0800	[thread overview]
Message-ID: <20210816065417.3987596-1-chenhuacai@loongson.cn> (raw)

fault_in_user_writeable() should verify R/W access but only verify W. In
most archs W implies R, but not true in MIPS and LoongArch, so fix it.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Hongchen Zhang <zhanghongchen@loongson.cn>
---
 kernel/futex.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/kernel/futex.c b/kernel/futex.c
index 2ecb07575055..c3b68be31bf3 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -672,10 +672,15 @@ static int get_futex_key(u32 __user *uaddr, bool fshared, union futex_key *key,
  */
 static int fault_in_user_writeable(u32 __user *uaddr)
 {
-	struct mm_struct *mm = current->mm;
 	int ret;
+	struct mm_struct *mm = current->mm;
+	struct vm_area_struct *vma;
 
 	mmap_read_lock(mm);
+	vma = find_vma(mm, (unsigned long)uaddr);
+	if (!(vma->vm_flags & VM_READ))
+		ret = -EFAULT;
+
 	ret = fixup_user_fault(mm, (unsigned long)uaddr,
 			       FAULT_FLAG_WRITE, NULL);
 	mmap_read_unlock(mm);
-- 
2.27.0


             reply	other threads:[~2021-08-16  6:54 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-16  6:54 Huacai Chen [this message]
2021-08-16 18:27 ` [PATCH] futex: Fix fault_in_user_writeable() Davidlohr Bueso
2021-08-16 19:03   ` Thomas Gleixner
2021-08-17  1:53     ` Huacai Chen
2021-08-17  7:07       ` Thomas Gleixner
2021-08-17  7:38         ` Huacai Chen
2021-08-17  9:05           ` Thomas Gleixner
2021-08-17  9:45             ` Peter Zijlstra
2021-08-17 12:27               ` Huacai Chen
2021-08-17  9:22       ` Peter Zijlstra

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