From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1346CC19F37 for ; Thu, 19 Aug 2021 16:38:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DD7DD610A6 for ; Thu, 19 Aug 2021 16:38:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231361AbhHSQip (ORCPT ); Thu, 19 Aug 2021 12:38:45 -0400 Received: from mga17.intel.com ([192.55.52.151]:5070 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229960AbhHSQif (ORCPT ); Thu, 19 Aug 2021 12:38:35 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10081"; a="196853697" X-IronPort-AV: E=Sophos;i="5.84,335,1620716400"; d="scan'208";a="196853697" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Aug 2021 09:37:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,335,1620716400"; d="scan'208";a="594867685" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 19 Aug 2021 09:37:52 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id A31D22E4; Thu, 19 Aug 2021 19:37:52 +0300 (EEST) From: Andy Shevchenko To: Hans de Goede , Andy Shevchenko , Kate Hsuan , Srinivas Pandruvada , linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, Dell.Client.Kernel@dell.com Cc: Mark Gross , Alex Hung , Rajneesh Bhardwaj , David E Box , Zha Qipeng , Mika Westerberg , "David E. Box" , AceLan Kao , Jithu Joseph , Maurice Ma Subject: [PATCH v4 03/21] platform/x86: intel_mrfld_pwrbtn: Move to intel sub-directory Date: Thu, 19 Aug 2021 19:37:17 +0300 Message-Id: <20210819163735.81803-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210819163735.81803-1-andriy.shevchenko@linux.intel.com> References: <20210819163735.81803-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kate Hsuan Move Intel Merrifield power button driver to intel sub-directory to improve readability. Signed-off-by: Kate Hsuan Reviewed-by: Hans de Goede Signed-off-by: Andy Shevchenko --- drivers/platform/x86/Kconfig | 11 ----------- drivers/platform/x86/Makefile | 1 - drivers/platform/x86/intel/Kconfig | 11 +++++++++++ drivers/platform/x86/intel/Makefile | 2 ++ .../{intel_mrfld_pwrbtn.c => intel/mrfld_pwrbtn.c} | 0 5 files changed, 13 insertions(+), 12 deletions(-) rename drivers/platform/x86/{intel_mrfld_pwrbtn.c => intel/mrfld_pwrbtn.c} (100%) diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index ba0454450335..2d6723bb6459 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -1159,17 +1159,6 @@ config INTEL_UNCORE_FREQ_CONTROL To compile this driver as a module, choose M here: the module will be called intel-uncore-frequency. -config INTEL_MRFLD_PWRBTN - tristate "Intel Merrifield Basin Cove power button driver" - depends on INTEL_SOC_PMIC_MRFLD - depends on INPUT - help - This option adds a power button driver for Basin Cove PMIC - on Intel Merrifield devices. - - To compile this driver as a module, choose M here: the module - will be called intel_mrfld_pwrbtn. - config INTEL_PMC_CORE tristate "Intel PMC Core driver" depends on PCI diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile index bf94af0749f5..f70c0aa30cdd 100644 --- a/drivers/platform/x86/Makefile +++ b/drivers/platform/x86/Makefile @@ -127,7 +127,6 @@ obj-$(CONFIG_INTEL_TURBO_MAX_3) += intel_turbo_max_3.o obj-$(CONFIG_INTEL_UNCORE_FREQ_CONTROL) += intel-uncore-frequency.o # Intel PMIC / PMC / P-Unit devices -obj-$(CONFIG_INTEL_MRFLD_PWRBTN) += intel_mrfld_pwrbtn.o obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core.o intel_pmc_core_pltdrv.o obj-$(CONFIG_INTEL_PUNIT_IPC) += intel_punit_ipc.o obj-$(CONFIG_INTEL_SCU_IPC) += intel_scu_ipc.o diff --git a/drivers/platform/x86/intel/Kconfig b/drivers/platform/x86/intel/Kconfig index 3792a5492a8a..9e719db8450c 100644 --- a/drivers/platform/x86/intel/Kconfig +++ b/drivers/platform/x86/intel/Kconfig @@ -42,4 +42,15 @@ config INTEL_CHTDC_TI_PWRBTN To compile this driver as a module, choose M here: the module will be called intel_chtdc_ti_pwrbtn. +config INTEL_MRFLD_PWRBTN + tristate "Intel Merrifield Basin Cove power button driver" + depends on INTEL_SOC_PMIC_MRFLD + depends on INPUT + help + This option adds a power button driver for Basin Cove PMIC + on Intel Merrifield devices. + + To compile this driver as a module, choose M here: the module + will be called intel_mrfld_pwrbtn. + endif # X86_PLATFORM_DRIVERS_INTEL diff --git a/drivers/platform/x86/intel/Makefile b/drivers/platform/x86/intel/Makefile index 52d7bc0948f3..4ff755a11770 100644 --- a/drivers/platform/x86/intel/Makefile +++ b/drivers/platform/x86/intel/Makefile @@ -14,3 +14,5 @@ intel_bxtwc_tmu-y := bxtwc_tmu.o obj-$(CONFIG_INTEL_BXTWC_PMIC_TMU) += intel_bxtwc_tmu.o intel_chtdc_ti_pwrbtn-y := chtdc_ti_pwrbtn.o obj-$(CONFIG_INTEL_CHTDC_TI_PWRBTN) += intel_chtdc_ti_pwrbtn.o +intel_mrfld_pwrbtn-y := mrfld_pwrbtn.o +obj-$(CONFIG_INTEL_MRFLD_PWRBTN) += intel_mrfld_pwrbtn.o diff --git a/drivers/platform/x86/intel_mrfld_pwrbtn.c b/drivers/platform/x86/intel/mrfld_pwrbtn.c similarity index 100% rename from drivers/platform/x86/intel_mrfld_pwrbtn.c rename to drivers/platform/x86/intel/mrfld_pwrbtn.c -- 2.32.0