From: Chun-Jie Chen <chun-jie.chen@mediatek.com> To: Matthias Brugger <matthias.bgg@gmail.com>, Stephen Boyd <sboyd@kernel.org>, Nicolas Boichat <drinkcat@chromium.org>, Rob Herring <robh+dt@kernel.org> Cc: <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <srv_heupstream@mediatek.com>, <Project_Global_Chrome_Upstream_Group@mediatek.com>, Chun-Jie Chen <chun-jie.chen@mediatek.com> Subject: [v2 13/24] clk: mediatek: Add MT8195 ipesys clock support Date: Fri, 20 Aug 2021 19:14:53 +0800 [thread overview] Message-ID: <20210820111504.350-14-chun-jie.chen@mediatek.com> (raw) In-Reply-To: <20210820111504.350-1-chun-jie.chen@mediatek.com> Add MT8195 ipesys clock controller which provides clock gate control for ipe IP block. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> --- drivers/clk/mediatek/Makefile | 2 +- drivers/clk/mediatek/clk-mt8195-ipe.c | 51 +++++++++++++++++++++++++++ 2 files changed, 52 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/mediatek/clk-mt8195-ipe.c diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile index f9736e6640ce..84d315a6b3e4 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediatek/Makefile @@ -81,6 +81,6 @@ obj-$(CONFIG_COMMON_CLK_MT8192_SCP_ADSP) += clk-mt8192-scp_adsp.o obj-$(CONFIG_COMMON_CLK_MT8192_VDECSYS) += clk-mt8192-vdec.o obj-$(CONFIG_COMMON_CLK_MT8192_VENCSYS) += clk-mt8192-venc.o obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o clk-mt8195-topckgen.o clk-mt8195-peri_ao.o clk-mt8195-infra_ao.o clk-mt8195-cam.o \ - clk-mt8195-ccu.o clk-mt8195-img.o + clk-mt8195-ccu.o clk-mt8195-img.o clk-mt8195-ipe.o obj-$(CONFIG_COMMON_CLK_MT8516) += clk-mt8516.o obj-$(CONFIG_COMMON_CLK_MT8516_AUDSYS) += clk-mt8516-aud.o diff --git a/drivers/clk/mediatek/clk-mt8195-ipe.c b/drivers/clk/mediatek/clk-mt8195-ipe.c new file mode 100644 index 000000000000..fc176e844973 --- /dev/null +++ b/drivers/clk/mediatek/clk-mt8195-ipe.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Copyright (c) 2021 MediaTek Inc. +// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> + +#include "clk-gate.h" +#include "clk-mtk.h" + +#include <dt-bindings/clock/mt8195-clk.h> +#include <linux/clk-provider.h> +#include <linux/platform_device.h> + +static const struct mtk_gate_regs ipe_cg_regs = { + .set_ofs = 0x0, + .clr_ofs = 0x0, + .sta_ofs = 0x0, +}; + +#define GATE_IPE(_id, _name, _parent, _shift) \ + GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr) + +static const struct mtk_gate ipe_clks[] = { + GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "top_ipe", 0), + GATE_IPE(CLK_IPE_FDVT, "ipe_fdvt", "top_ipe", 1), + GATE_IPE(CLK_IPE_ME, "ipe_me", "top_ipe", 2), + GATE_IPE(CLK_IPE_TOP, "ipe_top", "top_ipe", 3), + GATE_IPE(CLK_IPE_SMI_LARB12, "ipe_smi_larb12", "top_ipe", 4), +}; + +static const struct mtk_clk_desc ipe_desc = { + .clks = ipe_clks, + .num_clks = ARRAY_SIZE(ipe_clks), +}; + +static const struct of_device_id of_match_clk_mt8195_ipe[] = { + { + .compatible = "mediatek,mt8195-ipesys", + .data = &ipe_desc, + }, { + /* sentinel */ + } +}; + +static struct platform_driver clk_mt8195_ipe_drv = { + .probe = mtk_clk_simple_probe, + .driver = { + .name = "clk-mt8195-ipe", + .of_match_table = of_match_clk_mt8195_ipe, + }, +}; +builtin_platform_driver(clk_mt8195_ipe_drv); -- 2.18.0
next prev parent reply other threads:[~2021-08-20 11:17 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-20 11:14 [v2 00/24] Mediatek MT8195 " Chun-Jie Chen 2021-08-20 11:14 ` [v2 01/24] dt-bindings: ARM: Mediatek: Add new document bindings of MT8195 clock Chun-Jie Chen 2021-08-23 6:53 ` Chen-Yu Tsai 2021-08-24 14:44 ` Rob Herring 2021-08-20 11:14 ` [v2 02/24] clk: mediatek: Add dt-bindings of MT8195 clocks Chun-Jie Chen 2021-08-24 15:17 ` Rob Herring 2021-08-25 11:39 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 03/24] clk: mediatek: Fix corner case of tuner_en_reg Chun-Jie Chen 2021-08-20 11:14 ` [v2 04/24] clk: mediatek: Add API for clock resource recycle Chun-Jie Chen 2021-08-23 6:40 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 05/24] clk: mediatek: Fix resource leak in mtk_clk_simple_probe Chun-Jie Chen 2021-08-23 6:42 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 06/24] clk: mediatek: Add MT8195 apmixedsys clock support Chun-Jie Chen 2021-08-23 9:21 ` Chen-Yu Tsai 2021-08-23 9:56 ` Chen-Yu Tsai 2021-08-29 18:26 ` Stephen Boyd 2021-08-20 11:14 ` [v2 07/24] clk: mediatek: Add MT8195 topckgen " Chun-Jie Chen 2021-08-23 11:16 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 08/24] clk: mediatek: Add MT8195 peripheral " Chun-Jie Chen 2021-08-23 11:22 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 09/24] clk: mediatek: Add MT8195 infrastructure " Chun-Jie Chen 2021-08-23 11:32 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 10/24] clk: mediatek: Add MT8195 camsys " Chun-Jie Chen 2021-08-20 11:14 ` [v2 11/24] clk: mediatek: Add MT8195 ccusys " Chun-Jie Chen 2021-08-23 12:13 ` Chen-Yu Tsai 2021-09-10 10:52 ` Chun-Jie Chen 2021-08-20 11:14 ` [v2 12/24] clk: mediatek: Add MT8195 imgsys " Chun-Jie Chen 2021-08-20 11:14 ` Chun-Jie Chen [this message] 2021-08-23 12:20 ` [v2 13/24] clk: mediatek: Add MT8195 ipesys " Chen-Yu Tsai 2021-08-20 11:14 ` [v2 14/24] clk: mediatek: Add MT8195 mfgcfg " Chun-Jie Chen 2021-08-23 12:02 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 15/24] clk: mediatek: Add MT8195 scp adsp " Chun-Jie Chen 2021-08-23 12:08 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 16/24] clk: mediatek: Add MT8195 vdecsys " Chun-Jie Chen 2021-08-23 12:21 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 17/24] clk: mediatek: Add MT8195 vdosys0 " Chun-Jie Chen 2021-08-25 10:52 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 18/24] clk: mediatek: Add MT8195 vdosys1 " Chun-Jie Chen 2021-08-25 10:55 ` Chen-Yu Tsai 2021-08-20 11:14 ` [v2 19/24] clk: mediatek: Add MT8195 vencsys " Chun-Jie Chen 2021-08-25 11:03 ` Chen-Yu Tsai 2021-09-10 11:09 ` Chun-Jie Chen 2021-09-14 3:47 ` Chen-Yu Tsai 2021-08-20 11:15 ` [v2 20/24] clk: mediatek: Add MT8195 vppsys0 " Chun-Jie Chen 2021-08-25 10:59 ` Chen-Yu Tsai 2021-08-20 11:15 ` [v2 21/24] clk: mediatek: Add MT8195 vppsys1 " Chun-Jie Chen 2021-08-25 11:00 ` Chen-Yu Tsai 2021-08-20 11:15 ` [v2 22/24] clk: mediatek: Add MT8195 wpesys " Chun-Jie Chen 2021-08-25 11:34 ` Chen-Yu Tsai 2021-09-10 11:04 ` Chun-Jie Chen 2021-08-20 11:15 ` [v2 23/24] clk: mediatek: Add MT8195 imp i2c wrapper " Chun-Jie Chen 2021-08-23 12:50 ` Chen-Yu Tsai 2021-08-20 11:15 ` [v2 24/24] clk: mediatek: Add MT8195 apusys " Chun-Jie Chen 2021-08-23 12:48 ` Chen-Yu Tsai
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