From: Huacai Chen <chenhuacai@loongson.cn>
To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>
Cc: linux-kernel@vger.kernel.org, Xuefeng Li <lixuefeng@loongson.cn>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>
Subject: [PATCH V3 06/10] irqchip/loongson-htvec: Add suspend/resume support
Date: Wed, 25 Aug 2021 14:11:48 +0800 [thread overview]
Message-ID: <20210825061152.3396398-7-chenhuacai@loongson.cn> (raw)
In-Reply-To: <20210825061152.3396398-1-chenhuacai@loongson.cn>
Add suspend/resume support for HTVEC irqchip, which is needed for
suspend/hibernation.
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
drivers/irqchip/irq-loongson-htvec.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/irqchip/irq-loongson-htvec.c b/drivers/irqchip/irq-loongson-htvec.c
index e969e4588600..d4190fa588d2 100644
--- a/drivers/irqchip/irq-loongson-htvec.c
+++ b/drivers/irqchip/irq-loongson-htvec.c
@@ -16,6 +16,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
+#include <linux/syscore_ops.h>
/* Registers */
#define HTVEC_EN_OFF 0x20
@@ -30,6 +31,7 @@ struct htvec {
struct irq_domain *htvec_domain;
raw_spinlock_t htvec_lock;
struct fwnode_handle *domain_handle;
+ u32 saved_vec_en[HTVEC_MAX_PARENT_IRQ];
};
struct htvec *htvec_priv;
@@ -157,6 +159,29 @@ static void htvec_reset(struct htvec *priv)
}
}
+static int htvec_suspend(void)
+{
+ int i;
+
+ for (i = 0; i < htvec_priv->num_parents; i++)
+ htvec_priv->saved_vec_en[i] = readl(htvec_priv->base + HTVEC_EN_OFF + 4 * i);
+
+ return 0;
+}
+
+static void htvec_resume(void)
+{
+ int i;
+
+ for (i = 0; i < htvec_priv->num_parents; i++)
+ writel(htvec_priv->saved_vec_en[i], htvec_priv->base + HTVEC_EN_OFF + 4 * i);
+}
+
+static struct syscore_ops htvec_syscore_ops = {
+ .suspend = htvec_suspend,
+ .resume = htvec_resume,
+};
+
static int htvec_init(phys_addr_t addr, unsigned long size,
int num_parents, int parent_irq[], struct fwnode_handle *domain_handle)
{
@@ -190,6 +215,8 @@ static int htvec_init(phys_addr_t addr, unsigned long size,
htvec_priv = priv;
+ register_syscore_ops(&htvec_syscore_ops);
+
return 0;
iounmap_base:
--
2.27.0
next prev parent reply other threads:[~2021-08-25 6:14 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-25 6:11 [PATCH V3 00/10] irqchip: Add LoongArch-related irqchip drivers Huacai Chen
2021-08-25 6:11 ` [PATCH V3 01/10] irqchip: Adjust Kconfig for Loongson Huacai Chen
2021-08-25 6:11 ` [PATCH V3 02/10] irqchip/loongson-pch-pic: Add ACPI init support Huacai Chen
2021-08-25 6:11 ` [PATCH V3 03/10] irqchip/loongson-pch-pic: Add suspend/resume support Huacai Chen
2021-08-25 6:11 ` [PATCH V3 04/10] irqchip/loongson-pch-msi: Add ACPI init support Huacai Chen
2021-08-25 6:11 ` [PATCH V3 05/10] irqchip/loongson-htvec: " Huacai Chen
2021-08-25 6:11 ` Huacai Chen [this message]
2021-08-25 6:11 ` [PATCH V3 07/10] irqchip/loongson-liointc: " Huacai Chen
2021-08-25 6:11 ` [PATCH V3 08/10] irqchip: Add LoongArch CPU interrupt controller support Huacai Chen
2021-08-25 8:40 ` Marc Zyngier
2021-08-27 8:12 ` Huacai Chen
2021-08-28 10:07 ` Huacai Chen
2021-08-28 11:07 ` Marc Zyngier
2021-08-29 9:37 ` Huacai Chen
2021-08-29 10:10 ` Marc Zyngier
2021-08-29 10:34 ` Huacai Chen
2021-08-29 11:00 ` Marc Zyngier
2021-08-30 3:19 ` Huacai Chen
2021-08-25 6:11 ` [PATCH V3 09/10] irqchip: Add Loongson Extended I/O " Huacai Chen
2021-08-25 6:11 ` [PATCH V3 10/10] irqchip: Add Loongson PCH LPC " Huacai Chen
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