From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEF97C4320A for ; Wed, 25 Aug 2021 10:27:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B9B1A61184 for ; Wed, 25 Aug 2021 10:27:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240234AbhHYK1y (ORCPT ); Wed, 25 Aug 2021 06:27:54 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:48080 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240045AbhHYK1c (ORCPT ); Wed, 25 Aug 2021 06:27:32 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id EA9011F4370F From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: matthias.bgg@gmail.com, hsinyi@chromium.org, linux-mediatek@lists.infradead.org, jitao.shi@mediatek.com, eizan@chromium.org, drinkcat@chromium.org, chunkuang.hu@kernel.org, kernel@collabora.com, Daniel Vetter , David Airlie , Philipp Zabel , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 7/7] drm/mediatek: mtk_dsi: Reset the dsi0 hardware Date: Wed, 25 Aug 2021 12:26:32 +0200 Message-Id: <20210825122613.v3.7.Idbb4727ddf00ba2fe796b630906baff10d994d89@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210825102632.601614-1-enric.balletbo@collabora.com> References: <20210825102632.601614-1-enric.balletbo@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reset dsi0 HW to default when power on. This prevents to have different settingis between the bootloader and the kernel. As not all Mediatek boards have the reset consumer configured in their board description, also is not needed on all of them, the reset is optional, so the change is compatible with all boards. Cc: Jitao Shi Suggested-by: Chun-Kuang Hu Signed-off-by: Enric Balletbo i Serra Acked-by: Chun-Kuang Hu Reviewed-by: Matthias Brugger --- Changes in v3: - Fix typo in the commit description drivers/gpu/drm/mediatek/mtk_dsi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index ae403c67cbd9..d8b81e2ab841 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -11,6 +11,7 @@ #include #include #include +#include #include