linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Huacai Chen <chenhuacai@loongson.cn>
To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>
Cc: linux-kernel@vger.kernel.org, Xuefeng Li <lixuefeng@loongson.cn>,
	Huacai Chen <chenhuacai@gmail.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Huacai Chen <chenhuacai@loongson.cn>
Subject: [PATCH V4 00/10] irqchip: Add LoongArch-related irqchip drivers
Date: Tue, 31 Aug 2021 17:27:06 +0800	[thread overview]
Message-ID: <20210831092716.4145604-1-chenhuacai@loongson.cn> (raw)

LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V.
LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit
version (LA32S) and a 64-bit version (LA64). LoongArch use ACPI as its
boot protocol LoongArch-specific interrupt controllers (similar to APIC)
are already added in the next revision of ACPI Specification (current
revision is 6.4).

This patchset adds some irqchip drivers for LoongArch, it is preparing
to add LoongArch support in mainline kernel, we can see a snapshot here:
https://github.com/loongson/linux/tree/loongarch-next

Cross-compile tool chain to build kernel:
https://github.com/loongson/build-tools/releases

Loongson and LoongArch documentations:
https://github.com/loongson/LoongArch-Documentation

LoongArch-specific interrupt controllers:
https://mantis.uefi.org/mantis/view.php?id=2203

V1 -> V2:
1, Remove queued patches;
2, Move common logic of DT/ACPI probing to common functions;
3, Split .suspend()/.resume() functions to separate patches.

V2 -> V3:
1, Fix a bug for loongson-pch-pic probe;
2, Some minor improvements for LPC controller.

V3 -> V4:
1, Rework the CPU interrupt controller driver;
2, Some minor improvements for other controllers.

Huacai Chen:
 irqchip: Adjust Kconfig for Loongson.
 irqchip/loongson-pch-pic: Add ACPI init support.
 irqchip/loongson-pch-pic: Add suspend/resume support.
 irqchip/loongson-pch-msi: Add ACPI init support.
 irqchip/loongson-htvec: Add ACPI init support.
 irqchip/loongson-htvec: Add suspend/resume support.
 irqchip/loongson-liointc: Add ACPI init support. 
 irqchip: Add LoongArch CPU interrupt controller support.
 irqchip: Add Loongson Extended I/O interrupt controller.
 irqchip: Add Loongson PCH LPC controller support.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 drivers/irqchip/Kconfig                |  37 +++-
 drivers/irqchip/Makefile               |   3 +
 drivers/irqchip/irq-loongarch-cpu.c    |  89 +++++++++
 drivers/irqchip/irq-loongson-eiointc.c | 331 +++++++++++++++++++++++++++++++++
 drivers/irqchip/irq-loongson-htvec.c   | 142 ++++++++++----
 drivers/irqchip/irq-loongson-liointc.c | 198 ++++++++++++--------
 drivers/irqchip/irq-loongson-pch-lpc.c | 203 ++++++++++++++++++++
 drivers/irqchip/irq-loongson-pch-msi.c | 119 +++++++-----
 drivers/irqchip/irq-loongson-pch-pic.c | 152 ++++++++++++---
 include/linux/cpuhotplug.h             |   1 +
 10 files changed, 1087 insertions(+), 188 deletions(-)
 create mode 100644 drivers/irqchip/irq-loongarch-cpu.c
 create mode 100644 drivers/irqchip/irq-loongson-eiointc.c
 create mode 100644 drivers/irqchip/irq-loongson-pch-lpc.c
--
2.27.0


             reply	other threads:[~2021-08-31  9:28 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-31  9:27 Huacai Chen [this message]
2021-08-31  9:27 ` [PATCH V4 01/10] irqchip: Adjust Kconfig for Loongson Huacai Chen
2021-08-31  9:27 ` [PATCH V4 02/10] irqchip/loongson-pch-pic: Add ACPI init support Huacai Chen
2021-08-31  9:27 ` [PATCH V4 03/10] irqchip/loongson-pch-pic: Add suspend/resume support Huacai Chen
2021-08-31  9:27 ` [PATCH V4 04/10] irqchip/loongson-pch-msi: Add ACPI init support Huacai Chen
2021-08-31  9:27 ` [PATCH V4 05/10] irqchip/loongson-htvec: " Huacai Chen
2021-08-31  9:27 ` [PATCH V4 06/10] irqchip/loongson-htvec: Add suspend/resume support Huacai Chen
2021-08-31  9:27 ` [PATCH V4 07/10] irqchip/loongson-liointc: Add ACPI init support Huacai Chen
2021-08-31  9:27 ` [PATCH V4 08/10] irqchip: Add LoongArch CPU interrupt controller support Huacai Chen
2021-08-31  9:27 ` [PATCH V4 09/10] irqchip: Add Loongson Extended I/O " Huacai Chen
2021-08-31  9:27 ` [PATCH V4 10/10] irqchip: Add Loongson PCH LPC " Huacai Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210831092716.4145604-1-chenhuacai@loongson.cn \
    --to=chenhuacai@loongson.cn \
    --cc=chenhuacai@gmail.com \
    --cc=jiaxun.yang@flygoat.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lixuefeng@loongson.cn \
    --cc=maz@kernel.org \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).