From: Kieran Bingham <kieran.bingham@ideasonboard.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Geert Uytterhoeven <geert@glider.be>,
linux-renesas-soc@vger.kernel.org
Cc: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v2 1/3] arm64: dts: renesas: r8a779a0: Add DU support
Date: Thu, 2 Sep 2021 00:53:28 +0100 [thread overview]
Message-ID: <20210901235330.1611086-2-kieran.bingham@ideasonboard.com> (raw)
In-Reply-To: <20210901235330.1611086-1-kieran.bingham@ideasonboard.com>
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Provide the device nodes for the DU on the V3U platforms.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
v2
- Use a single clock specification for the whole DU.
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 30 +++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 631d520cebee..3241f7e7c01e 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -1142,6 +1142,36 @@ vspd1: vsp@fea28000 {
renesas,fcp = <&fcpvd1>;
};
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a779a0";
+ reg = <0 0xfeb00000 0 0x40000>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 411>;
+ clock-names = "du";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 411>;
+ vsps = <&vspd0 0>, <&vspd1 0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_dsi0: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ du_out_dsi1: endpoint {
+ };
+ };
+ };
+ };
+
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
--
2.30.2
next parent reply other threads:[~2021-09-01 23:53 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210901235330.1611086-1-kieran.bingham@ideasonboard.com>
2021-09-01 23:53 ` Kieran Bingham [this message]
2021-09-22 23:32 ` [PATCH v2 1/3] arm64: dts: renesas: r8a779a0: Add DU support Laurent Pinchart
2021-09-01 23:53 ` [PATCH v2 2/3] arm64: dts: renesas: r8a779a0: Add DSI encoders Kieran Bingham
2021-09-21 15:52 ` Geert Uytterhoeven
2021-09-22 23:34 ` Laurent Pinchart
2021-09-01 23:53 ` [PATCH v2 3/3] arm64: dts: renesas: falcon-cpu: Add DSI display output Kieran Bingham
2021-09-21 15:59 ` Geert Uytterhoeven
2021-09-22 23:40 ` Laurent Pinchart
2021-09-22 23:56 ` Laurent Pinchart
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