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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id r11sm214068ejy.71.2021.09.03.16.16.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Sep 2021 16:16:40 -0700 (PDT) From: Nicolas Frattaroli To: Rob Herring , Heiko Stuebner Cc: Nicolas Frattaroli , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 4/4] arm64: dts: rockchip: add analog audio on Quartz64 Date: Sat, 4 Sep 2021 01:15:36 +0200 Message-Id: <20210903231536.225540-5-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210903231536.225540-1-frattaroli.nicolas@gmail.com> References: <20210903231536.225540-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On the Quartz64 Model A, the I2S1 TDM controller is connected to the rk817 codec in I2S mode. Enabling it and adding the necessary simple-sound-card and codec nodes allows for analog audio output on the PINE64 Quartz64 Model A SBC. Signed-off-by: Nicolas Frattaroli --- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 35 ++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index a244f7b87e38..3a87c0240b30 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -58,6 +58,20 @@ led-diy { }; }; + rk817-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "Analog RK817"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + }; + vcc12v_dcin: vcc12v_dcin { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; @@ -199,8 +213,13 @@ rk817: pmic@20 { interrupts = ; clock-output-names = "rk808-clkout1", "rk808-clkout2"; + #sound-dai-cells = <0>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; + pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; rockchip,system-power-controller; wakeup-source; #clock-cells = <1>; @@ -389,9 +408,23 @@ regulator-state-mem { }; }; }; + + rk817_codec: codec { + }; + }; }; +&i2s1_8ch { + status = "okay"; + rockchip,trcm-sync-tx-only; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; +}; + &mdio1 { rgmii_phy1: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; -- 2.33.0