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[2001:470:26:54b:226:9eff:fe70:80c2]) by smtp.gmail.com with ESMTPSA id o8sm142625lfr.265.2021.09.08.02.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Sep 2021 02:42:54 -0700 (PDT) Received: from home.paul.comp (home.paul.comp [IPv6:0:0:0:0:0:0:0:1]) by home.paul.comp (8.15.2/8.15.2/Debian-14~deb10u1) with ESMTP id 1889gpxA015666; Wed, 8 Sep 2021 12:42:52 +0300 Received: (from paul@localhost) by home.paul.comp (8.15.2/8.15.2/Submit) id 1889gnns015665; Wed, 8 Sep 2021 12:42:49 +0300 Date: Wed, 8 Sep 2021 12:42:49 +0300 From: Paul Fertser To: Chia-Wei Wang Cc: robh+dt@kernel.org, joel@jms.id.au, andrew@aj.id.au, lee.jones@linaro.org, osk@google.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, Konstantin Klubnichkin Subject: Re: [PATCH v2 0/3] arm: aspeed: Add UART routing support Message-ID: <20210908094248.GZ23326@home.paul.comp> References: <20210902021817.17506-1-chiawei_wang@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210902021817.17506-1-chiawei_wang@aspeedtech.com> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, On Thu, Sep 02, 2021 at 10:18:13AM +0800, Chia-Wei Wang wrote: > Add UART routing driver and the device tree nodes. Thank you for working on exposing this functionality in upstreamable way, that's so much better than all the register-level hacks in U-Boot and similar approaches! One (somewhat) related question that I hope you do not mind answering: is there anything special regarding the routing or other configuration that needs to be done for VUART to work with IRQs? The reason I ask is that I have tried hard (and I know several other developers who have too) to use VUART functionality but somehow as soon as Linux was booting on host and starting to use the IRQ-based 16550 driver the communication was halted both ways. Basically, the BMC firmware was enabling VUART in DTS, then setting LPC address to 0x3F8 and LPC IRQ to 4 and reading/writing using the corresponding /dev/ttyS* node. The datasheet is not clearly telling what other actions need to be performed for this to work. Not using VUART and instead routing UART1 lines with exactly the same pinctrl/pinmux worked just fine. One detail is that with VUART the host wasn't seeing new interrupts but when they were simulated by exporting the LPC interrupt pin via /sys/class/gpio and toggling it manually the data was getting through. Does UART1 need some explicit disabling for VUART IRQs to work? It looks like setting LPC address and IRQ number in VUART is enough to override the register part but probably not for the interrupt? -- Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software! mailto:fercerpav@gmail.com