From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1DB74C43217 for ; Sat, 18 Sep 2021 14:40:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 04B5D61284 for ; Sat, 18 Sep 2021 14:40:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238263AbhIROmI (ORCPT ); Sat, 18 Sep 2021 10:42:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238210AbhIROmG (ORCPT ); Sat, 18 Sep 2021 10:42:06 -0400 Received: from relay08.th.seeweb.it (relay08.th.seeweb.it [IPv6:2001:4b7a:2000:18::169]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 882FAC061574 for ; Sat, 18 Sep 2021 07:40:42 -0700 (PDT) Received: from SoMainline.org (94-209-165-62.cable.dynamic.v4.ziggo.nl [94.209.165.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id D2B1F3E7C9; Sat, 18 Sep 2021 16:40:39 +0200 (CEST) Date: Sat, 18 Sep 2021 16:40:38 +0200 From: Marijn Suijten To: Stephen Boyd , Dmitry Baryshkov , Rob Clark Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Andy Gross , Bjorn Andersson , Michael Turquette , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Dmitry Baryshkov , Abhinav Kumar , Jonathan Marek , Matthias Kaehlcke , Douglas Anderson , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: Re: [PATCH v3 0/2] Use "ref" clocks from firmware for DSI PLL VCO parent Message-ID: <20210918144038.6q352hzqopx7vvdu@SoMainline.org> References: <20210911131922.387964-1-marijn.suijten@somainline.org> <163165584152.763609.4056232270079096475@swboyd.mtv.corp.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <163165584152.763609.4056232270079096475@swboyd.mtv.corp.google.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-09-14 14:44:01, Stephen Boyd wrote: > Quoting Marijn Suijten (2021-09-11 06:19:19) > > All DSI PHY/PLL drivers were referencing their VCO parent clock by a > > global name, most of which don't exist or have been renamed. These > > clock drivers seem to function fine without that except the 14nm driver > > for sdm6xx [1]. > > > > At the same time all DTs provide a "ref" clock as per the requirements > > of dsi-phy-common.yaml, but the clock is never used. This patchset puts > > that clock to use without relying on a global clock name, so that all > > dependencies are explicitly defined in DT (the firmware) in the end. > > I can take this through clk tree if it helps avoid conflicts. There are > some other patches to sdm660.c in the clk tree already. Might be useful to maintain proper ordering of these dependent patches but it's up to Dmitry and Rob to decide, whom I'm sending this mail directly to so that they can chime in.