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* [PATCH 0/3] RZ/G2L SMARC EVK enable ADC and CAN interfaces
@ 2021-09-22 21:20 Lad Prabhakar
  2021-09-22 21:20 ` [PATCH 1/3] arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI Lad Prabhakar
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Lad Prabhakar @ 2021-09-22 21:20 UTC (permalink / raw)
  To: Geert Uytterhoeven, Magnus Damm, Rob Herring
  Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar, Biju Das,
	Lad Prabhakar

Hi All,

This patch series enables ADC and CAN interfaces on RZ/G2L SMARC EVK.

Note: Patches apply on top of [1] + [2]
[1] https://git.kernel.org/pub/scm/linux/kernel/
git/geert/renesas-devel.git/log/?h=renesas-arm-dt-for-v5.16
[2] https://patchwork.kernel.org/project/linux-renesas-soc/
cover/20210921084605.16250-1-biju.das.jz@bp.renesas.com/

Cheers,
Prabhakar

Lad Prabhakar (3):
  arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to
    SOM DTSI
  arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform
  arm64: dts: renesas: rzg2l-smarc: Enable CANFD

 .../boot/dts/renesas/r9a07g044l2-smarc.dts    |  7 +--
 .../boot/dts/renesas/rzg2l-smarc-som.dtsi     | 35 +++++++++++++++
 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi  | 44 +++++++++++++++++--
 3 files changed, 76 insertions(+), 10 deletions(-)
 create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi

-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 1/3] arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI
  2021-09-22 21:20 [PATCH 0/3] RZ/G2L SMARC EVK enable ADC and CAN interfaces Lad Prabhakar
@ 2021-09-22 21:20 ` Lad Prabhakar
  2021-09-24  8:51   ` Geert Uytterhoeven
  2021-09-22 21:20 ` [PATCH 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform Lad Prabhakar
  2021-09-22 21:20 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable CANFD Lad Prabhakar
  2 siblings, 1 reply; 8+ messages in thread
From: Lad Prabhakar @ 2021-09-22 21:20 UTC (permalink / raw)
  To: Geert Uytterhoeven, Magnus Damm, Rob Herring
  Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar, Biju Das,
	Lad Prabhakar

Move extal and memory nodes to SOM DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 .../boot/dts/renesas/r9a07g044l2-smarc.dts     |  7 +------
 .../boot/dts/renesas/rzg2l-smarc-som.dtsi      | 18 ++++++++++++++++++
 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi   |  4 ----
 3 files changed, 19 insertions(+), 10 deletions(-)
 create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
index d3f72ec62f03..247b0b3f1b58 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
@@ -7,15 +7,10 @@
 
 /dts-v1/;
 #include "r9a07g044l2.dtsi"
+#include "rzg2l-smarc-som.dtsi"
 #include "rzg2l-smarc.dtsi"
 
 / {
 	model = "Renesas SMARC EVK based on r9a07g044l2";
 	compatible = "renesas,smarc-evk", "renesas,r9a07g044l2", "renesas,r9a07g044";
-
-	memory@48000000 {
-		device_type = "memory";
-		/* first 128MB is reserved for secure area. */
-		reg = <0x0 0x48000000 0x0 0x78000000>;
-	};
 };
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
new file mode 100644
index 000000000000..0748f2e7396a
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2L SMARC SOM common parts
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+/ {
+	memory@48000000 {
+		device_type = "memory";
+		/* first 128MB is reserved for secure area. */
+		reg = <0x0 0x48000000 0x0 0x78000000>;
+	};
+};
+
+&extal_clk {
+	clock-frequency = <24000000>;
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index 39e05169aaaa..e895f6e7fa28 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -89,10 +89,6 @@
 	status = "okay";
 };
 
-&extal_clk {
-	clock-frequency = <24000000>;
-};
-
 &hsusb {
 	dr_mode = "otg";
 	status = "okay";
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform
  2021-09-22 21:20 [PATCH 0/3] RZ/G2L SMARC EVK enable ADC and CAN interfaces Lad Prabhakar
  2021-09-22 21:20 ` [PATCH 1/3] arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI Lad Prabhakar
@ 2021-09-22 21:20 ` Lad Prabhakar
  2021-09-24  8:56   ` Geert Uytterhoeven
  2021-09-22 21:20 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable CANFD Lad Prabhakar
  2 siblings, 1 reply; 8+ messages in thread
From: Lad Prabhakar @ 2021-09-22 21:20 UTC (permalink / raw)
  To: Geert Uytterhoeven, Magnus Damm, Rob Herring
  Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar, Biju Das,
	Lad Prabhakar

Enable the ADC which is present on RZ/G2L SMARC SOM.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 .../arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
index 0748f2e7396a..da1ee2206e1a 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -5,6 +5,8 @@
  * Copyright (C) 2021 Renesas Electronics Corp.
  */
 
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
 / {
 	memory@48000000 {
 		device_type = "memory";
@@ -13,6 +15,21 @@
 	};
 };
 
+&adc {
+	pinctrl-0 = <&adc_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	/delete-node/ channel@6;
+	/delete-node/ channel@7;
+};
+
 &extal_clk {
 	clock-frequency = <24000000>;
 };
+
+&pinctrl {
+	adc_pins: adc {
+		pinmux = <RZG2L_PORT_PINMUX(9, 0, 2)>; /* ADC_TRG */
+	};
+};
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable CANFD
  2021-09-22 21:20 [PATCH 0/3] RZ/G2L SMARC EVK enable ADC and CAN interfaces Lad Prabhakar
  2021-09-22 21:20 ` [PATCH 1/3] arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI Lad Prabhakar
  2021-09-22 21:20 ` [PATCH 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform Lad Prabhakar
@ 2021-09-22 21:20 ` Lad Prabhakar
  2021-09-24  9:07   ` Geert Uytterhoeven
  2 siblings, 1 reply; 8+ messages in thread
From: Lad Prabhakar @ 2021-09-22 21:20 UTC (permalink / raw)
  To: Geert Uytterhoeven, Magnus Damm, Rob Herring
  Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar, Biju Das,
	Lad Prabhakar

Enable CANFD on RZ/G2L SMARC platform.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 40 ++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index e895f6e7fa28..5dc4fff33076 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -80,6 +80,20 @@
 	clock-frequency = <12288000>;
 };
 
+&canfd {
+	pinctrl-0 = <&can0_pins &can1_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	channel0 {
+		status = "okay";
+	};
+
+	channel1 {
+		status = "okay";
+	};
+};
+
 &ehci0 {
 	dr_mode = "otg";
 	status = "okay";
@@ -139,6 +153,32 @@
 	pinctrl-0 = <&sound_clk_pins>;
 	pinctrl-names = "default";
 
+	can0_pins: can0 {
+		pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
+			 <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
+	};
+
+	/* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
+	can0-stb {
+		gpio-hog;
+		gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_LOW>;
+		output-high;
+		line-name = "can0_stb";
+	};
+
+	can1_pins: can1 {
+		pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
+			 <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
+	};
+
+	/* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
+	can1-stb {
+		gpio-hog;
+		gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_LOW>;
+		output-high;
+		line-name = "can1_stb";
+	};
+
 	i2c0_pins: i2c0 {
 		pins = "RIIC0_SDA", "RIIC0_SCL";
 		input-enable;
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/3] arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI
  2021-09-22 21:20 ` [PATCH 1/3] arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI Lad Prabhakar
@ 2021-09-24  8:51   ` Geert Uytterhoeven
  0 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2021-09-24  8:51 UTC (permalink / raw)
  To: Lad Prabhakar
  Cc: Geert Uytterhoeven, Magnus Damm, Rob Herring, Linux-Renesas,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Linux Kernel Mailing List, Prabhakar, Biju Das

On Wed, Sep 22, 2021 at 11:21 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Move extal and memory nodes to SOM DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.16.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform
  2021-09-22 21:20 ` [PATCH 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform Lad Prabhakar
@ 2021-09-24  8:56   ` Geert Uytterhoeven
  0 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2021-09-24  8:56 UTC (permalink / raw)
  To: Lad Prabhakar
  Cc: Magnus Damm, Rob Herring, Linux-Renesas,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Linux Kernel Mailing List, Prabhakar, Biju Das

On Wed, Sep 22, 2021 at 11:21 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Enable the ADC which is present on RZ/G2L SMARC SOM.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.16.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable CANFD
  2021-09-22 21:20 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable CANFD Lad Prabhakar
@ 2021-09-24  9:07   ` Geert Uytterhoeven
  2021-09-24 10:15     ` Lad, Prabhakar
  0 siblings, 1 reply; 8+ messages in thread
From: Geert Uytterhoeven @ 2021-09-24  9:07 UTC (permalink / raw)
  To: Lad Prabhakar
  Cc: Geert Uytterhoeven, Magnus Damm, Rob Herring, Linux-Renesas,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Linux Kernel Mailing List, Prabhakar, Biju Das

Hi Prabhakar,

On Wed, Sep 22, 2021 at 11:21 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Enable CANFD on RZ/G2L SMARC platform.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> @@ -139,6 +153,32 @@
>         pinctrl-0 = <&sound_clk_pins>;
>         pinctrl-names = "default";
>
> +       can0_pins: can0 {
> +               pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
> +                        <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
> +       };
> +
> +       /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
> +       can0-stb {
> +               gpio-hog;
> +               gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_LOW>;
> +               output-high;

While this drives the STB signal correctly, I find it confusing.
According to the datasheet, the STB signal is active-high, so it has to
be pulled low to disable standby.
So to reflect the meaning of the STB line, I would write:

        gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>;
        output-low;

> +               line-name = "can0_stb";
> +       };
> +
> +       can1_pins: can1 {
> +               pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
> +                        <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
> +       };
> +
> +       /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
> +       can1-stb {
> +               gpio-hog;
> +               gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_LOW>;
> +               output-high;

Likewise.

> +               line-name = "can1_stb";
> +       };
> +

The rest looks good to me, so with the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable CANFD
  2021-09-24  9:07   ` Geert Uytterhoeven
@ 2021-09-24 10:15     ` Lad, Prabhakar
  0 siblings, 0 replies; 8+ messages in thread
From: Lad, Prabhakar @ 2021-09-24 10:15 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Lad Prabhakar, Geert Uytterhoeven, Magnus Damm, Rob Herring,
	Linux-Renesas,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Linux Kernel Mailing List, Biju Das

Hi Geert,

Thank you for the review.

On Fri, Sep 24, 2021 at 10:07 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Wed, Sep 22, 2021 at 11:21 PM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> > Enable CANFD on RZ/G2L SMARC platform.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > @@ -139,6 +153,32 @@
> >         pinctrl-0 = <&sound_clk_pins>;
> >         pinctrl-names = "default";
> >
> > +       can0_pins: can0 {
> > +               pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
> > +                        <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
> > +       };
> > +
> > +       /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
> > +       can0-stb {
> > +               gpio-hog;
> > +               gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_LOW>;
> > +               output-high;
>
> While this drives the STB signal correctly, I find it confusing.
> According to the datasheet, the STB signal is active-high, so it has to
> be pulled low to disable standby.
agreed.

> So to reflect the meaning of the STB line, I would write:
>
>         gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>;
>         output-low;
>
will re-spin the patch 3/3 as above.

Cheers,
Prabhakar

> > +               line-name = "can0_stb";
> > +       };
> > +
> > +       can1_pins: can1 {
> > +               pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
> > +                        <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
> > +       };
> > +
> > +       /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
> > +       can1-stb {
> > +               gpio-hog;
> > +               gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_LOW>;
> > +               output-high;
>
> Likewise.
>
> > +               line-name = "can1_stb";
> > +       };
> > +
>
> The rest looks good to me, so with the above fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2021-09-24 10:16 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-22 21:20 [PATCH 0/3] RZ/G2L SMARC EVK enable ADC and CAN interfaces Lad Prabhakar
2021-09-22 21:20 ` [PATCH 1/3] arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI Lad Prabhakar
2021-09-24  8:51   ` Geert Uytterhoeven
2021-09-22 21:20 ` [PATCH 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform Lad Prabhakar
2021-09-24  8:56   ` Geert Uytterhoeven
2021-09-22 21:20 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable CANFD Lad Prabhakar
2021-09-24  9:07   ` Geert Uytterhoeven
2021-09-24 10:15     ` Lad, Prabhakar

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