From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19B46C4332F for ; Thu, 23 Sep 2021 16:22:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 050956115A for ; Thu, 23 Sep 2021 16:22:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242098AbhIWQYV (ORCPT ); Thu, 23 Sep 2021 12:24:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46402 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242132AbhIWQYE (ORCPT ); Thu, 23 Sep 2021 12:24:04 -0400 Received: from relay08.th.seeweb.it (relay08.th.seeweb.it [IPv6:2001:4b7a:2000:18::169]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6CD15C061767 for ; Thu, 23 Sep 2021 09:22:21 -0700 (PDT) Received: from localhost.localdomain (83.6.166.81.neoplus.adsl.tpnet.pl [83.6.166.81]) by m-r2.th.seeweb.it (Postfix) with ESMTPA id 5E2B03F67F; Thu, 23 Sep 2021 18:22:19 +0200 (CEST) From: Konrad Dybcio To: ~postmarketos/upstreaming@lists.sr.ht Cc: martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, jamipkettunen@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 08/17] arm64: dts: qcom: sm6350: Add cpufreq-hw support Date: Thu, 23 Sep 2021 18:21:54 +0200 Message-Id: <20210923162204.21752-8-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210923162204.21752-1-konrad.dybcio@somainline.org> References: <20210923162204.21752-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add cpufreq-hw node and assign qcom,freq-domain properties to CPUs to enable CPU clock scaling. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index ad755a16310a..582915d2b4f0 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -42,6 +42,7 @@ CPU0: cpu@0 { capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; next-level-cache = <&L2_0>; + qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; @@ -60,6 +61,7 @@ CPU1: cpu@100 { capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; next-level-cache = <&L2_100>; + qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; @@ -75,6 +77,7 @@ CPU2: cpu@200 { capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; next-level-cache = <&L2_200>; + qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; @@ -90,6 +93,7 @@ CPU3: cpu@300 { capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; next-level-cache = <&L2_300>; + qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; @@ -105,6 +109,7 @@ CPU4: cpu@400 { capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; next-level-cache = <&L2_400>; + qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; @@ -120,6 +125,7 @@ CPU5: cpu@500 { capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; next-level-cache = <&L2_500>; + qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; @@ -136,6 +142,7 @@ CPU6: cpu@600 { capacity-dmips-mhz = <1894>; dynamic-power-coefficient = <703>; next-level-cache = <&L2_600>; + qcom,freq-domain = <&cpufreq_hw 1>; #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; @@ -151,6 +158,7 @@ CPU7: cpu@700 { capacity-dmips-mhz = <1894>; dynamic-power-coefficient = <703>; next-level-cache = <&L2_700>; + qcom,freq-domain = <&cpufreq_hw 1>; #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; @@ -621,6 +629,16 @@ rpmhcc: clock-controller { clocks = <&xo_board>; }; }; + + cpufreq_hw: cpufreq@18323000 { + compatible = "qcom,cpufreq-hw"; + reg = <0 0x18323000 0 0x1000>, <0 0x18325800 0 0x1000>; + reg-names = "freq-domain0", "freq-domain1"; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #freq-domain-cells = <1>; + }; }; timer { -- 2.33.0