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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id o72sm11108725pjo.50.2021.10.04.10.42.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Oct 2021 10:42:41 -0700 (PDT) Date: Mon, 4 Oct 2021 11:42:39 -0600 From: Mathieu Poirier To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, maz@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, james.morse@arm.com, anshuman.khandual@arm.com, leo.yan@linaro.org, mike.leach@linaro.org, will@kernel.org, lcherian@marvell.com, coresight@lists.linaro.org Subject: Re: [PATCH v2 12/17] coresight: trbe: Add a helper to fetch cpudata from perf handle Message-ID: <20211004174239.GB3263478@p14s> References: <20210921134121.2423546-1-suzuki.poulose@arm.com> <20210921134121.2423546-13-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210921134121.2423546-13-suzuki.poulose@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 21, 2021 at 02:41:16PM +0100, Suzuki K Poulose wrote: > Add a helper to get the CPU specific data for TRBE instance, from > a given perf handle. This also adds extra checks to make sure that > the event associated with the handle is "bound" to the CPU and is > active on the TRBE. > > Cc: Anshuman Khandual > Cc: Mike Leach > Cc: Mathieu Poirier > Cc: Leo Yan > Signed-off-by: Suzuki K Poulose > --- > drivers/hwtracing/coresight/coresight-trbe.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c > index 983dd5039e52..797d978f9fa7 100644 > --- a/drivers/hwtracing/coresight/coresight-trbe.c > +++ b/drivers/hwtracing/coresight/coresight-trbe.c > @@ -268,6 +268,15 @@ static unsigned long trbe_snapshot_offset(struct perf_output_handle *handle) > return buf->nr_pages * PAGE_SIZE; > } > > +static inline struct trbe_cpudata * > +trbe_handle_to_cpudata(struct perf_output_handle *handle) > +{ > + struct trbe_buf *buf = etm_perf_sink_config(handle); > + > + BUG_ON(!buf || !buf->cpudata); > + return buf->cpudata; > +} > + > /* > * TRBE Limit Calculation > * > @@ -533,8 +542,7 @@ static enum trbe_fault_action trbe_get_fault_act(struct perf_output_handle *hand > { > int ec = get_trbe_ec(trbsr); > int bsc = get_trbe_bsc(trbsr); > - struct trbe_buf *buf = etm_perf_sink_config(handle); > - struct trbe_cpudata *cpudata = buf->cpudata; > + struct trbe_cpudata *cpudata = trbe_handle_to_cpudata(handle); There is two other places where this pattern is present: is_perf_trbe() and __trbe_normal_offset(). I have to stop here for today. More comments tomorrow. Thanks, Mathieu > > WARN_ON(is_trbe_running(trbsr)); > if (is_trbe_trg(trbsr) || is_trbe_abort(trbsr)) > -- > 2.24.1 >