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From: Kajol Jain <kjain@linux.ibm.com>
To: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org,
	linux-kernel@vger.kernel.org, peterz@infradead.org,
	mingo@redhat.com, acme@kernel.org, jolsa@kernel.org,
	namhyung@kernel.org, ak@linux.intel.com
Cc: linux-perf-users@vger.kernel.org, maddy@linux.ibm.com,
	atrajeev@linux.vnet.ibm.com, rnsastry@linux.ibm.com,
	yao.jin@linux.intel.com, ast@kernel.org, daniel@iogearbox.net,
	songliubraving@fb.com, kan.liang@linux.intel.com,
	mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
	paulus@samba.org, kjain@linux.ibm.com
Subject: [PATCH 2/4] perf: Add mem_hops field in perf_mem_data_src structure
Date: Tue,  5 Oct 2021 14:48:35 +0530	[thread overview]
Message-ID: <20211005091837.250044-2-kjain@linux.ibm.com> (raw)
In-Reply-To: <20211005091837.250044-1-kjain@linux.ibm.com>

Going forward, future generation systems can have more hierarchy
within the chip/package level but currently we don't have any data source
encoding field in perf, which can be used to represent this level of data.

Add a new field called 'mem_hops' in the perf_mem_data_src structure
which can be used to represent intra-chip/package or inter-chip/off-package
details. This field is of size 3 bits where PERF_MEM_HOPS_{NA, 0..6} value
can be used to present different hop levels data.

Also add corresponding macros to define mem_hop field values
and shift value.

Currently we define macro for HOPS_0 which corresponds
to data coming from another core but same chip.

For ex: Encodings for mem_hops fields with L2 cache:

L2			- local L2
L2 | REMOTE | HOPS_0	- remote core, same chip L2

Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
---
 include/uapi/linux/perf_event.h | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index e1701e9c7858..42680563228c 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -1210,14 +1210,16 @@ union perf_mem_data_src {
 			mem_remote:1,   /* remote */
 			mem_snoopx:2,	/* snoop mode, ext */
 			mem_blk:3,	/* access blocked */
-			mem_rsvd:21;
+			mem_hops:3,	/* hop level */
+			mem_rsvd:18;
 	};
 };
 #elif defined(__BIG_ENDIAN_BITFIELD)
 union perf_mem_data_src {
 	__u64 val;
 	struct {
-		__u64	mem_rsvd:21,
+		__u64	mem_rsvd:18,
+			mem_hops:3,	/* hop level */
 			mem_blk:3,	/* access blocked */
 			mem_snoopx:2,	/* snoop mode, ext */
 			mem_remote:1,   /* remote */
@@ -1313,6 +1315,11 @@ union perf_mem_data_src {
 #define PERF_MEM_BLK_ADDR	0x04 /* address conflict */
 #define PERF_MEM_BLK_SHIFT	40
 
+/* hop level */
+#define PERF_MEM_HOPS_0		0x01 /* remote core, same chip */
+/* 2-7 available */
+#define PERF_MEM_HOPS_SHIFT	43
+
 #define PERF_MEM_S(a, s) \
 	(((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
 
-- 
2.26.2


  reply	other threads:[~2021-10-05  9:20 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-05  9:18 [PATCH 1/4] perf: Add comment about current state of PERF_MEM_LVL_* namespace and remove an extra line Kajol Jain
2021-10-05  9:18 ` Kajol Jain [this message]
2021-10-05 20:20   ` [PATCH 2/4] perf: Add mem_hops field in perf_mem_data_src structure Peter Zijlstra
2021-10-06  6:38     ` kajoljain
2021-10-05  9:18 ` [PATCH 3/4] tools/perf: " Kajol Jain
2021-10-05  9:18 ` [PATCH 4/4] powerpc/perf: Fix data source encodings for L2.1 and L3.1 accesses Kajol Jain
2021-10-05  9:48 ` [PATCH 1/4] perf: Add comment about current state of PERF_MEM_LVL_* namespace and remove an extra line kajoljain

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