From: "Paweł Anikiel" <pan@semihalf.com>
To: jarkko.nikula@linux.intel.com, andriy.shevchenko@linux.intel.com,
mika.westerberg@linux.intel.com, robh+dt@kernel.org,
p.zabel@pengutronix.de, arnd@arndb.de, olof@lixom.net,
soc@kernel.org, dinguyen@kernel.org, p.yadav@ti.com,
Tudor.Ambarus@microchip.com
Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
alexandre.belloni@bootlin.com, sre@kernel.org,
thunder.leizhen@huawei.com, Jonathan.Cameron@huawei.com,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
ka@semihalf.com, tn@semihalf.com, jam@semihalf.com,
amstan@google.com, "Paweł Anikiel" <pan@semihalf.com>,
"Joanna Brozek" <jbrozek@antmicro.com>,
"Mariusz Glebocki" <mglebocki@antmicro.com>,
"Tomasz Gorochowik" <tgorochowik@antmicro.com>,
"Maciej Mikunda" <mmikunda@antmicro.com>
Subject: [PATCH v2 4/4] dts: socfpga: Add Mercury+ AA1 devicetree
Date: Tue, 5 Oct 2021 16:37:48 +0200 [thread overview]
Message-ID: <20211005143748.2471647-5-pan@semihalf.com> (raw)
In-Reply-To: <20211005143748.2471647-1-pan@semihalf.com>
Add support for the Mercury+ AA1 module for Arria 10 SoC FPGA.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Signed-off-by: Joanna Brozek <jbrozek@antmicro.com>
Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Signed-off-by: Maciej Mikunda <mmikunda@antmicro.com>
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/socfpga_arria10_mercury_aa1.dts | 111 ++++++++++++++++++
2 files changed, 112 insertions(+)
create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e0934180724..0a7809eb3795 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1078,6 +1078,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \
socfpga_arria10_socdk_nand.dtb \
socfpga_arria10_socdk_qspi.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
+ socfpga_arria10_mercury_aa1.dtb \
socfpga_cyclone5_chameleon96.dtb \
socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_socdk.dtb \
diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts
new file mode 100644
index 000000000000..1e11168b80db
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "socfpga_arria10.dtsi"
+
+/ {
+
+ model = "Enclustra Mercury AA1";
+ compatible = "altr,socfpga-arria10", "altr,socfpga";
+
+ aliases {
+ ethernet0 = &gmac0;
+ serial1 = &uart1;
+ };
+
+ memory@0 {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x0 0x80000000>; /* 2GB */
+ };
+
+ chosen {
+ stdout-path = "serial1:115200n8";
+ };
+};
+
+&eccmgr {
+ sdmmca-ecc@ff8c2c00 {
+ compatible = "altr,socfpga-sdmmc-ecc";
+ reg = <0xff8c2c00 0x400>;
+ altr,ecc-parent = <&mmc>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
+ <47 IRQ_TYPE_LEVEL_HIGH>,
+ <16 IRQ_TYPE_LEVEL_HIGH>,
+ <48 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
+&gmac0 {
+ phy-mode = "rgmii";
+ phy-addr = <0xffffffff>; /* probe for phy addr */
+
+ max-frame-size = <3800>;
+ status = "okay";
+
+ phy-handle = <&phy3>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy3: ethernet-phy@3 {
+ txd0-skew-ps = <0>; /* -420ps */
+ txd1-skew-ps = <0>; /* -420ps */
+ txd2-skew-ps = <0>; /* -420ps */
+ txd3-skew-ps = <0>; /* -420ps */
+ rxd0-skew-ps = <420>; /* 0ps */
+ rxd1-skew-ps = <420>; /* 0ps */
+ rxd2-skew-ps = <420>; /* 0ps */
+ rxd3-skew-ps = <420>; /* 0ps */
+ txen-skew-ps = <0>; /* -420ps */
+ txc-skew-ps = <1860>; /* 960ps */
+ rxdv-skew-ps = <420>; /* 0ps */
+ rxc-skew-ps = <1680>; /* 780ps */
+ reg = <3>;
+ };
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&gpio2 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ busno = <1>;
+ isl12022: isl12022@6f {
+ status = "okay";
+ compatible = "isil,isl12022";
+ reg = <0x6f>;
+ };
+};
+
+/* Following mappings are taken from arria10 socdk dts */
+&mmc {
+ status = "okay";
+ cap-sd-highspeed;
+ broken-cd;
+ bus-width = <4>;
+};
+
+&osc1 {
+ clock-frequency = <33330000>;
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+};
--
2.25.1
next prev parent reply other threads:[~2021-10-05 14:38 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-05 14:37 [PATCH v2 0/4] Add support for the Mercury+ AA1 module Paweł Anikiel
2021-10-05 14:37 ` [PATCH v2 1/4] i2c: check bus number property in DesignWare I2C Controller Paweł Anikiel
2021-10-05 16:19 ` Andy Shevchenko
2021-10-05 14:37 ` [PATCH v2 2/4] dt-bindings: add bus number property Paweł Anikiel
2021-10-05 16:22 ` Arnd Bergmann
2021-10-05 16:28 ` Alexandre Belloni
2021-10-06 9:29 ` Paweł Anikiel
[not found] ` <CAF9_jYT6mbk6dr8=ZYZ8B=gxnuHas7QBfDfuoTJnMzSKZt=WGw@mail.gmail.com>
2021-10-06 9:41 ` Arnd Bergmann
2021-10-05 14:37 ` [PATCH v2 3/4] reset: socfpga: add empty driver allowing consumers to probe Paweł Anikiel
2021-10-05 14:37 ` Paweł Anikiel [this message]
[not found] ` <20211005143746.xE5rCkt-P_XlNkn9bJ8ZqYPY4nQQ7doqzSd4FrAlICY@z>
2021-10-14 16:46 ` [PATCH v2 2/4] dt-bindings: add bus number property Rob Herring
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