From: Vincenzo Frascino <vincenzo.frascino@arm.com>
To: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com
Cc: vincenzo.frascino@arm.com,
Andrew Morton <akpm@linux-foundation.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Dmitry Vyukov <dvyukov@google.com>,
Andrey Ryabinin <aryabinin@virtuozzo.com>,
Alexander Potapenko <glider@google.com>,
Marco Elver <elver@google.com>,
Evgenii Stepanov <eugenis@google.com>,
Branislav Rankov <Branislav.Rankov@arm.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Suzuki K Poulose <Suzuki.Poulose@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v3 3/5] arm64: mte: CPU feature detection for Asymm MTE
Date: Wed, 6 Oct 2021 16:47:49 +0100 [thread overview]
Message-ID: <20211006154751.4463-4-vincenzo.frascino@arm.com> (raw)
In-Reply-To: <20211006154751.4463-1-vincenzo.frascino@arm.com>
Add the cpufeature entries to detect the presence of Asymmetric MTE.
Note: The tag checking mode is initialized via cpu_enable_mte() ->
kasan_init_hw_tags() hence to enable it we require asymmetric mode
to be at least on the boot CPU. If the boot CPU does not have it, it is
fine for late CPUs to have it as long as the feature is not enabled
(ARM64_CPUCAP_BOOT_CPU_FEATURE).
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm64/kernel/cpufeature.c | 10 ++++++++++
arch/arm64/tools/cpucaps | 1 +
2 files changed, 11 insertions(+)
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 6ec7036ef7e1..9e3e8ad75f20 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2321,6 +2321,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.sign = FTR_UNSIGNED,
.cpu_enable = cpu_enable_mte,
},
+ {
+ .desc = "Asymmetric MTE Tag Check Fault",
+ .capability = ARM64_MTE_ASYMM,
+ .type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
+ .matches = has_cpuid_feature,
+ .sys_reg = SYS_ID_AA64PFR1_EL1,
+ .field_pos = ID_AA64PFR1_MTE_SHIFT,
+ .min_field_value = ID_AA64PFR1_MTE_ASYMM,
+ .sign = FTR_UNSIGNED,
+ },
#endif /* CONFIG_ARM64_MTE */
{
.desc = "RCpc load-acquire (LDAPR)",
diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
index 49305c2e6dfd..74a569bf52d6 100644
--- a/arch/arm64/tools/cpucaps
+++ b/arch/arm64/tools/cpucaps
@@ -39,6 +39,7 @@ HW_DBM
KVM_PROTECTED_MODE
MISMATCHED_CACHE_TYPE
MTE
+MTE_ASYMM
SPECTRE_V2
SPECTRE_V3A
SPECTRE_V4
--
2.33.0
next prev parent reply other threads:[~2021-10-06 15:48 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-06 15:47 [PATCH v3 0/5] arm64: ARMv8.7-A: MTE: Add asymm in-kernel support Vincenzo Frascino
2021-10-06 15:47 ` [PATCH v3 1/5] kasan: Remove duplicate of kasan_flag_async Vincenzo Frascino
2021-10-06 15:47 ` [PATCH v3 2/5] arm64: mte: Bitfield definitions for Asymm MTE Vincenzo Frascino
2021-10-06 15:47 ` Vincenzo Frascino [this message]
2021-10-06 15:47 ` [PATCH v3 4/5] arm64: mte: Add asymmetric mode support Vincenzo Frascino
2021-10-06 23:06 ` Andrey Konovalov
2021-10-06 15:47 ` [PATCH v3 5/5] kasan: Extend KASAN mode kernel parameter Vincenzo Frascino
2021-10-06 23:06 ` Andrey Konovalov
2021-10-07 9:48 ` [PATCH v3 0/5] arm64: ARMv8.7-A: MTE: Add asymm in-kernel support Will Deacon
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