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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id b14sm9339589pfo.127.2021.10.06.10.15.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 10:15:38 -0700 (PDT) Date: Wed, 6 Oct 2021 11:15:36 -0600 From: Mathieu Poirier To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, maz@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, james.morse@arm.com, anshuman.khandual@arm.com, leo.yan@linaro.org, mike.leach@linaro.org, will@kernel.org, lcherian@marvell.com, coresight@lists.linaro.org Subject: Re: [PATCH v2 12/17] coresight: trbe: Add a helper to fetch cpudata from perf handle Message-ID: <20211006171536.GA3373323@p14s> References: <20210921134121.2423546-1-suzuki.poulose@arm.com> <20210921134121.2423546-13-suzuki.poulose@arm.com> <20211004174239.GB3263478@p14s> <0ff450f4-ab3e-b409-5278-35cdfb883284@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <0ff450f4-ab3e-b409-5278-35cdfb883284@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 05, 2021 at 11:35:13PM +0100, Suzuki K Poulose wrote: > Hi Mathieu > > On 04/10/2021 18:42, Mathieu Poirier wrote: > > On Tue, Sep 21, 2021 at 02:41:16PM +0100, Suzuki K Poulose wrote: > > > Add a helper to get the CPU specific data for TRBE instance, from > > > a given perf handle. This also adds extra checks to make sure that > > > the event associated with the handle is "bound" to the CPU and is > > > active on the TRBE. > > > > > > Cc: Anshuman Khandual > > > Cc: Mike Leach > > > Cc: Mathieu Poirier > > > Cc: Leo Yan > > > Signed-off-by: Suzuki K Poulose > > > --- > > > drivers/hwtracing/coresight/coresight-trbe.c | 12 ++++++++++-- > > > 1 file changed, 10 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c > > > index 983dd5039e52..797d978f9fa7 100644 > > > --- a/drivers/hwtracing/coresight/coresight-trbe.c > > > +++ b/drivers/hwtracing/coresight/coresight-trbe.c > > > @@ -268,6 +268,15 @@ static unsigned long trbe_snapshot_offset(struct perf_output_handle *handle) > > > return buf->nr_pages * PAGE_SIZE; > > > } > > > +static inline struct trbe_cpudata * > > > +trbe_handle_to_cpudata(struct perf_output_handle *handle) > > > +{ > > > + struct trbe_buf *buf = etm_perf_sink_config(handle); > > > + > > > + BUG_ON(!buf || !buf->cpudata); > > > + return buf->cpudata; > > > +} > > > + > > > /* > > > * TRBE Limit Calculation > > > * > > > @@ -533,8 +542,7 @@ static enum trbe_fault_action trbe_get_fault_act(struct perf_output_handle *hand > > > { > > > int ec = get_trbe_ec(trbsr); > > > int bsc = get_trbe_bsc(trbsr); > > > - struct trbe_buf *buf = etm_perf_sink_config(handle); > > > - struct trbe_cpudata *cpudata = buf->cpudata; > > > + struct trbe_cpudata *cpudata = trbe_handle_to_cpudata(handle); > > > > There is two other places where this pattern is present: is_perf_trbe() and > > __trbe_normal_offset(). > > I skipped them, as they have to get access to the "trbe_buf" anyways. > So the step by step, made sense. But I could replace them too to make it > transparent. > > What do you think ? Humm... I don't think there is a right way or a wrong way here. If we move forward with this patchset we have two ways of getting to buf->cpudata. One using trbe_handle_to_cpudata() and another one as laid out in is_perf_trbe() and __trbe_normal_offset(), each with an equal number of occurences (2 for each). I am usually not fond of small functions like trbe_handle_to_cpudata() and to me keeping the current heuristic in trbe_get_fault_act() would have been just fine. I agree with the argument that trbe_handle_to_cpudata() provides more checks but is it really worth it if they aren't done everywhere? In short I would get rid of trbe_handle_to_cpudata() entirely and live without the extra checks... But I'm not strongly opinionated on this either. > > Suzuki > >