linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Kai-Heng Feng <kai.heng.feng@canonical.com>
To: bhelgaas@google.com
Cc: hkallweit1@gmail.com, anthony.wong@canonical.com,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Kai-Heng Feng" <kai.heng.feng@canonical.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Vidya Sagar" <vidyas@nvidia.com>,
	"Logan Gunthorpe" <logang@deltatee.com>
Subject: [PATCH v2 3/3] PCI/ASPM: Add LTR sysfs attributes
Date: Thu, 21 Oct 2021 11:51:59 +0800	[thread overview]
Message-ID: <20211021035159.1117456-4-kai.heng.feng@canonical.com> (raw)
In-Reply-To: <20211021035159.1117456-1-kai.heng.feng@canonical.com>

Sometimes BIOS may not be able to program ASPM and LTR settings, for
instance, the NVMe devices behind Intel VMD bridges. For this case, both
ASPM and LTR have to be enabled to have significant power saving.

Since we still want POLICY_DEFAULT honor the default BIOS ASPM settings,
introduce LTR sysfs knobs so users can set max snoop and max nosnoop
latency manually or via udev rules.

[1] https://github.com/systemd/systemd/pull/17899/
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=209789
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
---
v2:
 - New patch.

 drivers/pci/pcie/aspm.c | 59 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 1560859ab056..f7dc62936445 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -1299,6 +1299,59 @@ static ssize_t clkpm_store(struct device *dev,
 	return len;
 }
 
+static ssize_t ltr_attr_show_common(struct device *dev,
+			  struct device_attribute *attr, char *buf, u8 state)
+{
+	struct pci_dev *pdev = to_pci_dev(dev);
+	int ltr;
+	u16 val;
+
+	ltr = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR);
+	if (!ltr)
+		return -EINVAL;
+
+	pci_read_config_word(pdev, ltr + state, &val);
+
+	return sysfs_emit(buf, "0x%0x\n", val);
+}
+
+static ssize_t ltr_attr_store_common(struct device *dev,
+			   struct device_attribute *attr,
+			   const char *buf, size_t len, u8 state)
+{
+	struct pci_dev *pdev = to_pci_dev(dev);
+	int ltr;
+	u16 val;
+
+	ltr = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR);
+	if (!ltr)
+		return -EINVAL;
+
+	if (kstrtou16(buf, 16, &val) < 0)
+		return -EINVAL;
+
+	/* LatencyScale is not permitted to be 110 or 111 */
+	if ((val >> 10) > 5)
+		return -EINVAL;
+
+	pci_write_config_word(pdev, ltr + state, val);
+
+	return len;
+}
+
+#define LTR_ATTR(_f, _s)						\
+static ssize_t _f##_show(struct device *dev,				\
+			 struct device_attribute *attr, char *buf)	\
+{ return ltr_attr_show_common(dev, attr, buf, PCI_LTR_##_s); }		\
+									\
+static ssize_t _f##_store(struct device *dev,				\
+			  struct device_attribute *attr,		\
+			  const char *buf, size_t len)			\
+{ return ltr_attr_store_common(dev, attr, buf, len, PCI_LTR_##_s); }
+
+LTR_ATTR(ltr_max_snoop_lat, MAX_SNOOP_LAT);
+LTR_ATTR(ltr_max_nosnoop_lat, MAX_NOSNOOP_LAT);
+
 static DEVICE_ATTR_RW(clkpm);
 static DEVICE_ATTR_RW(l0s_aspm);
 static DEVICE_ATTR_RW(l1_aspm);
@@ -1306,6 +1359,8 @@ static DEVICE_ATTR_RW(l1_1_aspm);
 static DEVICE_ATTR_RW(l1_2_aspm);
 static DEVICE_ATTR_RW(l1_1_pcipm);
 static DEVICE_ATTR_RW(l1_2_pcipm);
+static DEVICE_ATTR_RW(ltr_max_snoop_lat);
+static DEVICE_ATTR_RW(ltr_max_nosnoop_lat);
 
 static struct attribute *aspm_ctrl_attrs[] = {
 	&dev_attr_clkpm.attr,
@@ -1315,6 +1370,8 @@ static struct attribute *aspm_ctrl_attrs[] = {
 	&dev_attr_l1_2_aspm.attr,
 	&dev_attr_l1_1_pcipm.attr,
 	&dev_attr_l1_2_pcipm.attr,
+	&dev_attr_ltr_max_snoop_lat.attr,
+	&dev_attr_ltr_max_nosnoop_lat.attr,
 	NULL
 };
 
@@ -1338,6 +1395,8 @@ static umode_t aspm_ctrl_attrs_are_visible(struct kobject *kobj,
 
 	if (n == 0)
 		return link->clkpm_capable ? a->mode : 0;
+	else if (n == 7 || n == 8)
+		return pdev->ltr_path ? a->mode : 0;
 
 	return link->aspm_capable & aspm_state_map[n - 1] ? a->mode : 0;
 }
-- 
2.32.0


  parent reply	other threads:[~2021-10-21  3:52 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-21  3:51 [PATCH v2 0/3] Let user enable ASPM and LTR via sysfs Kai-Heng Feng
2021-10-21  3:51 ` [PATCH v2 1/3] PCI/ASPM: Store disabled ASPM states Kai-Heng Feng
2021-10-21  3:51 ` [PATCH v2 2/3] PCI/ASPM: Use capability to override ASPM via sysfs Kai-Heng Feng
2021-10-21  3:51 ` Kai-Heng Feng [this message]
2021-10-21 15:09   ` [PATCH v2 3/3] PCI/ASPM: Add LTR sysfs attributes Bjorn Helgaas
2021-10-25 10:33     ` Kai-Heng Feng
2021-10-25 17:31       ` Bjorn Helgaas
2021-10-26  2:28         ` Kai-Heng Feng
2021-10-26 16:53           ` Bjorn Helgaas
2021-10-28  5:16             ` Kai-Heng Feng

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20211021035159.1117456-4-kai.heng.feng@canonical.com \
    --to=kai.heng.feng@canonical.com \
    --cc=anthony.wong@canonical.com \
    --cc=bhelgaas@google.com \
    --cc=hkallweit1@gmail.com \
    --cc=kw@linux.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=logang@deltatee.com \
    --cc=vidyas@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).