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From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: Olof Johansson <olof@lixom.net>, Arnd Bergmann <arnd@arndb.de>,
	arm@kernel.org, soc@kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Palmer Dabbelt <palmerdabbelt@google.com>
Subject: [GIT PULL] riscv: dts: few cleanups for v5.16
Date: Thu, 21 Oct 2021 11:09:55 +0200	[thread overview]
Message-ID: <20211021090955.115005-1-krzysztof.kozlowski@canonical.com> (raw)

Hi Arnd and Olof,

I have an old patchset for RISC-V dts cleanups which I sent to mailing lists in
August 2021 (v1, v2), resent in September and pinged two times.  They got some
review (from Alexandre Ghiti for SiFive, from Conor Dooley for Microchip) but
unfortunately Palmer (RISC-V maintainer) did not respond here.

The usual RISC-V patches go via Palmer to Linus and I am not planning to change
that, but I want to get these fixed.

Could you grab these to soc tree?

Best regards,
Krzysztof



The following changes since commit 6880fa6c56601bb8ed59df6c30fd390cc5f6dd8f:

  Linux 5.15-rc1 (2021-09-12 16:28:37 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/riscv-sifive-dt-5.16

for you to fetch changes up to 9962a066f3c1d4588d0dd876ceac2c03ef87acf3:

  riscv: dts: sifive: add missing compatible for plic (2021-10-19 10:59:57 +0200)

----------------------------------------------------------------
RISC-V DTS changes for v5.16

Cleanups of RISC-V SiFive and Microchip DTSes with dtschema.  These are
few minor fixes to make DTSes pass the dtschema, without actual
functional effect.

----------------------------------------------------------------
Krzysztof Kozlowski (5):
      riscv: dts: sifive: use only generic JEDEC SPI NOR flash compatible
      riscv: dts: sifive: fix Unleashed board compatible
      riscv: dts: sifive: drop duplicated nodes and properties in sifive
      riscv: dts: microchip: add missing compatibles for clint and plic
      riscv: dts: sifive: add missing compatible for plic

 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi   |  4 ++--
 arch/riscv/boot/dts/sifive/fu540-c000.dtsi          |  2 +-
 arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 10 +++-------
 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts |  7 +------
 4 files changed, 7 insertions(+), 16 deletions(-)

             reply	other threads:[~2021-10-21  9:10 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-21  9:09 Krzysztof Kozlowski [this message]
2021-10-21 12:23 ` Arnd Bergmann
2021-10-21 12:25   ` Krzysztof Kozlowski
2021-10-21 13:06   ` Conor.Dooley
2021-10-21 13:09     ` Krzysztof Kozlowski
2021-10-21 15:06       ` Palmer Dabbelt
2021-10-21 15:18         ` Arnd Bergmann
2021-10-21 15:35           ` Palmer Dabbelt
2021-10-22  8:55             ` Krzysztof Kozlowski

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