From: Biao Huang <biao.huang@mediatek.com>
To: <davem@davemloft.net>, Jakub Kicinski <kuba@kernel.org>,
Rob Herring <robh+dt@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Biao Huang <biao.huang@mediatek.com>, <netdev@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<srv_heupstream@mediatek.com>, <macpaul.lin@mediatek.com>
Subject: [PATCH v2 5/5] arm64: dts: mt8195: add ethernet device node
Date: Thu, 11 Nov 2021 15:12:14 +0800 [thread overview]
Message-ID: <20211111071214.21027-6-biao.huang@mediatek.com> (raw)
In-Reply-To: <20211111071214.21027-1-biao.huang@mediatek.com>
This patch adds device node for mt8195 ethernet.
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8195-evb.dts | 92 +++++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 70 ++++++++++++++++
2 files changed, 162 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-evb.dts b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
index 5cce9a5d3163..d90308f80229 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
@@ -5,6 +5,8 @@
*/
/dts-v1/;
#include "mt8195.dtsi"
+#include <dt-bindings/pinctrl/mt8195-pinfunc.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "MediaTek MT8195 evaluation board";
@@ -32,6 +34,96 @@ reserved_memory: reserved-memory {
};
};
+ð {
+ phy-mode ="rgmii-rxid";
+ phy-handle = <ð_phy0>;
+ snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
+ snps,reset-delays-us = <0 10000 10000>;
+ mediatek,tx-delay-ps = <2030>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <ð_default>;
+ pinctrl-1 = <ð_sleep>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ eth_phy0: eth_phy0@1 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ };
+ };
+};
+
+&pio {
+ eth_default: eth_default {
+ txd_pins {
+ pinmux = <PINMUX_GPIO77__FUNC_GBE_TXD3>,
+ <PINMUX_GPIO78__FUNC_GBE_TXD2>,
+ <PINMUX_GPIO79__FUNC_GBE_TXD1>,
+ <PINMUX_GPIO80__FUNC_GBE_TXD0>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ cc_pins {
+ pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>,
+ <PINMUX_GPIO88__FUNC_GBE_TXEN>,
+ <PINMUX_GPIO87__FUNC_GBE_RXDV>,
+ <PINMUX_GPIO86__FUNC_GBE_RXC>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ rxd_pins {
+ pinmux = <PINMUX_GPIO81__FUNC_GBE_RXD3>,
+ <PINMUX_GPIO82__FUNC_GBE_RXD2>,
+ <PINMUX_GPIO83__FUNC_GBE_RXD1>,
+ <PINMUX_GPIO84__FUNC_GBE_RXD0>;
+ };
+ mdio_pins {
+ pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>,
+ <PINMUX_GPIO90__FUNC_GBE_MDIO>;
+ input-enable;
+ };
+ power_pins {
+ pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
+ <PINMUX_GPIO92__FUNC_GPIO92>;
+ output-high;
+ };
+ };
+
+ eth_sleep: eth_sleep {
+ txd_pins {
+ pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
+ <PINMUX_GPIO78__FUNC_GPIO78>,
+ <PINMUX_GPIO79__FUNC_GPIO79>,
+ <PINMUX_GPIO80__FUNC_GPIO80>;
+ };
+ cc_pins {
+ pinmux = <PINMUX_GPIO85__FUNC_GPIO85>,
+ <PINMUX_GPIO88__FUNC_GPIO88>,
+ <PINMUX_GPIO87__FUNC_GPIO87>,
+ <PINMUX_GPIO86__FUNC_GPIO86>;
+ };
+ rxd_pins {
+ pinmux = <PINMUX_GPIO81__FUNC_GPIO81>,
+ <PINMUX_GPIO82__FUNC_GPIO82>,
+ <PINMUX_GPIO83__FUNC_GPIO83>,
+ <PINMUX_GPIO84__FUNC_GPIO84>;
+ };
+ mdio_pins {
+ pinmux = <PINMUX_GPIO89__FUNC_GPIO89>,
+ <PINMUX_GPIO90__FUNC_GPIO90>;
+ input-disable;
+ bias-disable;
+ };
+ power_pins {
+ pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
+ <PINMUX_GPIO92__FUNC_GPIO92>;
+ input-disable;
+ bias-disable;
+ };
+ };
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index a59c0e9d1fc2..f30a60dca5ef 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -823,6 +823,76 @@ spis1: spi@1101e000 {
status = "disabled";
};
+ eth: ethernet@11021000 {
+ compatible = "mediatek,mt8195-gmac", "snps,dwmac-5.10a";
+ reg = <0 0x11021000 0 0x4000>;
+ interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "macirq";
+ mac-address = [00 55 7b b5 7d f7];
+ clock-names = "axi",
+ "apb",
+ "mac_cg",
+ "mac_main",
+ "ptp_ref",
+ "rmii_internal";
+ clocks = <&pericfg_ao CLK_PERI_AO_ETHERNET>,
+ <&pericfg_ao CLK_PERI_AO_ETHERNET_BUS>,
+ <&pericfg_ao CLK_PERI_AO_ETHERNET_MAC>,
+ <&topckgen CLK_TOP_SNPS_ETH_250M>,
+ <&topckgen CLK_TOP_SNPS_ETH_62P4M_PTP>,
+ <&topckgen CLK_TOP_SNPS_ETH_50M_RMII>;
+ assigned-clocks = <&topckgen CLK_TOP_SNPS_ETH_250M>,
+ <&topckgen CLK_TOP_SNPS_ETH_62P4M_PTP>,
+ <&topckgen CLK_TOP_SNPS_ETH_50M_RMII>;
+ assigned-clock-parents = <&topckgen CLK_TOP_ETHPLL_D2>,
+ <&topckgen CLK_TOP_ETHPLL_D8>,
+ <&topckgen CLK_TOP_ETHPLL_D10>;
+ power-domains = <&spm MT8195_POWER_DOMAIN_ETHER>;
+ mediatek,pericfg = <&infracfg_ao>;
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+ snps,txpbl = <16>;
+ snps,rxpbl = <16>;
+ clk_csr = <0>;
+ status = "disabled";
+
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,wr_osr_lmt = <0x7>;
+ snps,rd_osr_lmt = <0x7>;
+ snps,blen = <0 0 0 0 16 8 4>;
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <1>;
+ snps,rx-sched-sp;
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,priority = <0x0>;
+ };
+ };
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <3>;
+ snps,tx-sched-wrr;
+ queue0 {
+ snps,weight = <0x10>;
+ snps,dcb-algorithm;
+ snps,priority = <0x0>;
+ };
+ queue1 {
+ snps,weight = <0x11>;
+ snps,dcb-algorithm;
+ snps,priority = <0x1>;
+ };
+ queue2 {
+ snps,weight = <0x12>;
+ snps,dcb-algorithm;
+ snps,priority = <0x2>;
+ };
+ };
+ };
+
mmc0: mmc@11230000 {
compatible = "mediatek,mt8195-mmc", "mediatek,mt8192-mmc";
reg = <0 0x11230000 0 0x10000>,
--
2.25.1
next prev parent reply other threads:[~2021-11-11 7:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-11 7:12 [PATCH v2 0/5] MediaTek Ethernet Patches on MT8195 Biao Huang
2021-11-11 7:12 ` [PATCH v2 1/5] net: stmmac: dwmac-mediatek: add platform level clocks management Biao Huang
2021-11-11 7:12 ` [PATCH v2 2/5] net: stmmac: dwmac-mediatek: Reuse more common features Biao Huang
2021-11-11 13:28 ` AngeloGioacchino Del Regno
2021-11-12 3:01 ` Biao Huang
2021-11-11 7:12 ` [PATCH v2 3/5] net: stmmac: dwmac-mediatek: add support for mt8195 Biao Huang
2021-11-11 13:26 ` AngeloGioacchino Del Regno
2021-11-12 2:40 ` Biao Huang
2021-11-11 13:27 ` AngeloGioacchino Del Regno
2021-11-11 7:12 ` [PATCH v2 4/5] dt-bindings: net: dwmac: Convert mediatek-dwmac to DT schema Biao Huang
2021-11-11 13:30 ` AngeloGioacchino Del Regno
2021-11-12 1:47 ` Biao Huang
2021-11-11 14:57 ` Rob Herring
2021-11-12 2:11 ` Biao Huang
2021-11-11 7:12 ` Biao Huang [this message]
2021-11-11 11:35 ` [PATCH v2 0/5] MediaTek Ethernet Patches on MT8195 Denis Kirjanov
2021-11-12 1:22 ` Biao Huang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211111071214.21027-6-biao.huang@mediatek.com \
--to=biao.huang@mediatek.com \
--cc=alexandre.torgue@foss.st.com \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=joabreu@synopsys.com \
--cc=kuba@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=macpaul.lin@mediatek.com \
--cc=matthias.bgg@gmail.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=netdev@vger.kernel.org \
--cc=peppe.cavallaro@st.com \
--cc=robh+dt@kernel.org \
--cc=srv_heupstream@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).