From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C694C433F5 for ; Fri, 19 Nov 2021 04:36:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 678C06139F for ; Fri, 19 Nov 2021 04:36:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233954AbhKSEjB (ORCPT ); Thu, 18 Nov 2021 23:39:01 -0500 Received: from wnew2-smtp.messagingengine.com ([64.147.123.27]:60043 "EHLO wnew2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233909AbhKSEi5 (ORCPT ); Thu, 18 Nov 2021 23:38:57 -0500 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailnew.west.internal (Postfix) with ESMTP id EAA032B01172; Thu, 18 Nov 2021 23:35:55 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Thu, 18 Nov 2021 23:35:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=fguoVogwmskAh lHrC9KOQfT5JQU7tzggdR1YQNV9uik=; b=o5JqvyCAYEVju+Yh4yL6P6ku03S5j wH4kwgzFs0RRrIdA0UXoQw9ks756W72259idvfzXdnjOCYNJ84UE4/0RRTYu+8A3 tnyb0ocht1KOCAh27Nx0TokcJI/yo6Kxp1LTHihqwDmuulaFhhFjShYxZ0Tq3xHJ o5VR7fI6HkG2EYb3potPcLr0RxBjy11X9nGmRV+cpU5AdFiyl/KtSW5UFtyyym+d g3/wNyRRNyieph9gGgtccmIYtvKwdx4jDfxBKMGkdBP0zoiADt1V9+A8MNvlhlkA CnBTwovrSBVrYDRjpV/5tIk1EVAQsrz1JsUU46rCPgX14x17pP0v0TgbQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=fguoVogwmskAhlHrC9KOQfT5JQU7tzggdR1YQNV9uik=; b=VRam4kUH sdrSfLCHkgyl7XojmkWgNGvuGs3SrmsvFe88C7nc+jXarD4ildE6dIcK/aZFIsq1 +xRaRsUMO9VeD0b4iBMSE0OU152PY7DVbG15TRd1/tc8gvzsVvoyMTxjilpHWbDw a/rdc9wccBDC7ObWJHXsod0GcnUeheLAxW5HpzD/nqt14u+71HF4GiyM7Ox3gWP6 8/q1T5Geuah9R3g1gDDcNZodB7R27YACYou2tYZo1X56GoFp/v+ouM1NidOr5g6P 02Dh9ZuP0/CMDUtQAr5XaraVxiJmyDAy37pXS9du80jfcAVtekPkOUp9DDiQN4Ku uVyaNWvU2UPdWg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvuddrfeejgdejudcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufgrmhhuvghl ucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecuggftrf grthhtvghrnhepudfhjeefvdfhgfefheetgffhieeigfefhefgvddvveefgeejheejvdfg jeehueeinecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomh epshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 18 Nov 2021 23:35:54 -0500 (EST) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , linux-sunxi@lists.linux.dev Cc: Michael Turquette , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Stephen Boyd , Samuel Holland , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v1 3/6] clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw Date: Thu, 18 Nov 2021 22:35:41 -0600 Message-Id: <20211119043545.4010-4-samuel@sholland.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211119043545.4010-1-samuel@sholland.org> References: <20211119043545.4010-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Referencing parents with clk_hw pointers is more efficient and removes the dependency on global clock names. clk_parent_data is needed when some parent clocks are provided from another driver. Add macros for declaring dividers that take advantage of these. Signed-off-by: Samuel Holland --- drivers/clk/sunxi-ng/ccu_mp.h | 49 +++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu_mp.h b/drivers/clk/sunxi-ng/ccu_mp.h index b392e0d575b5..6e50f3728fb5 100644 --- a/drivers/clk/sunxi-ng/ccu_mp.h +++ b/drivers/clk/sunxi-ng/ccu_mp.h @@ -82,6 +82,55 @@ struct ccu_mp { _muxshift, _muxwidth, \ 0, _flags) +#define SUNXI_CCU_MP_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ + _mshift, _mwidth, \ + _pshift, _pwidth, \ + _muxshift, _muxwidth, \ + _gate, _flags) \ + struct ccu_mp _struct = { \ + .enable = _gate, \ + .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ + .p = _SUNXI_CCU_DIV(_pshift, _pwidth), \ + .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \ + .common = { \ + .reg = _reg, \ + .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \ + _parents, \ + &ccu_mp_ops, \ + _flags), \ + } \ + } + +#define SUNXI_CCU_MP_DATA_WITH_MUX(_struct, _name, _parents, _reg, \ + _mshift, _mwidth, \ + _pshift, _pwidth, \ + _muxshift, _muxwidth, \ + _flags) \ + SUNXI_CCU_MP_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ + _mshift, _mwidth, \ + _pshift, _pwidth, \ + _muxshift, _muxwidth, \ + 0, _flags) + +#define SUNXI_CCU_MP_HW_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ + _mshift, _mwidth, \ + _pshift, _pwidth, \ + _muxshift, _muxwidth, \ + _gate, _flags) \ + struct ccu_mp _struct = { \ + .enable = _gate, \ + .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ + .p = _SUNXI_CCU_DIV(_pshift, _pwidth), \ + .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \ + .common = { \ + .reg = _reg, \ + .hw.init = CLK_HW_INIT_PARENTS_HW(_name, \ + _parents, \ + &ccu_mp_ops, \ + _flags), \ + } \ + } + static inline struct ccu_mp *hw_to_ccu_mp(struct clk_hw *hw) { struct ccu_common *common = hw_to_ccu_common(hw); -- 2.32.0