From: Huang Rui <ray.huang@amd.com>
To: "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Viresh Kumar <viresh.kumar@linaro.org>,
Shuah Khan <skhan@linuxfoundation.org>,
"Borislav Petkov" <bp@suse.de>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@kernel.org>,
Giovanni Gherdovich <ggherdovich@suse.cz>,
<linux-pm@vger.kernel.org>
Cc: Deepak Sharma <deepak.sharma@amd.com>,
Alex Deucher <alexander.deucher@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>,
Steven Noonan <steven@valvesoftware.com>,
Nathan Fontenot <nathan.fontenot@amd.com>,
Jinzhou Su <Jinzhou.Su@amd.com>,
Xiaojian Du <Xiaojian.Du@amd.com>, <linux-kernel@vger.kernel.org>,
<x86@kernel.org>, Huang Rui <ray.huang@amd.com>
Subject: [PATCH v4 07/22] cpufreq: amd: add fast switch function for amd-pstate
Date: Fri, 19 Nov 2021 18:30:47 +0800 [thread overview]
Message-ID: <20211119103102.88124-8-ray.huang@amd.com> (raw)
In-Reply-To: <20211119103102.88124-1-ray.huang@amd.com>
Introduce the fast switch function for amd-pstate on the AMD processors
which support the full MSR register control. It's able to decrease the
latency on interrupt context.
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
drivers/cpufreq/amd-pstate.c | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 8b501a72c3dd..4a02a42f4113 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -177,6 +177,38 @@ static int amd_pstate_target(struct cpufreq_policy *policy,
return 0;
}
+static void amd_pstate_adjust_perf(unsigned int cpu,
+ unsigned long _min_perf,
+ unsigned long target_perf,
+ unsigned long capacity)
+{
+ unsigned long max_perf, min_perf, des_perf,
+ cap_perf, lowest_nonlinear_perf;
+ struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
+ struct amd_cpudata *cpudata = policy->driver_data;
+
+ cap_perf = READ_ONCE(cpudata->highest_perf);
+ lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf);
+
+ if (target_perf < capacity)
+ des_perf = DIV_ROUND_UP(cap_perf * target_perf, capacity);
+
+ min_perf = READ_ONCE(cpudata->highest_perf);
+ if (_min_perf < capacity)
+ min_perf = DIV_ROUND_UP(cap_perf * _min_perf, capacity);
+
+ if (min_perf < lowest_nonlinear_perf)
+ min_perf = lowest_nonlinear_perf;
+
+ max_perf = cap_perf;
+ if (max_perf < min_perf)
+ max_perf = min_perf;
+
+ des_perf = clamp_t(unsigned long, des_perf, min_perf, max_perf);
+
+ amd_pstate_update(cpudata, min_perf, des_perf, max_perf, true);
+}
+
static int amd_get_min_freq(struct amd_cpudata *cpudata)
{
struct cppc_perf_caps cppc_perf;
@@ -293,6 +325,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
/* It will be updated by governor */
policy->cur = policy->cpuinfo.min_freq;
+ policy->fast_switch_possible = true;
+
ret = freq_qos_add_request(&policy->constraints, &cpudata->req[0],
FREQ_QOS_MIN, policy->cpuinfo.min_freq);
if (ret < 0) {
@@ -341,6 +375,7 @@ static struct cpufreq_driver amd_pstate_driver = {
.flags = CPUFREQ_CONST_LOOPS | CPUFREQ_NEED_UPDATE_LIMITS,
.verify = amd_pstate_verify,
.target = amd_pstate_target,
+ .adjust_perf = amd_pstate_adjust_perf,
.init = amd_pstate_cpu_init,
.exit = amd_pstate_cpu_exit,
.name = "amd-pstate",
--
2.25.1
next prev parent reply other threads:[~2021-11-19 10:32 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-19 10:30 [PATCH v4 00/22] cpufreq: introduce a new AMD CPU frequency control mechanism Huang Rui
2021-11-19 10:30 ` [PATCH v4 01/22] x86/cpufreatures: add AMD Collaborative Processor Performance Control feature flag Huang Rui
2021-11-19 10:30 ` [PATCH v4 02/22] x86/msr: add AMD CPPC MSR definitions Huang Rui
2021-11-19 10:30 ` [PATCH v4 03/22] ACPI: CPPC: implement support for SystemIO registers Huang Rui
2021-11-19 10:30 ` [PATCH v4 04/22] ACPI: CPPC: Check present CPUs for determining _CPC is valid Huang Rui
2021-11-19 10:30 ` [PATCH v4 05/22] ACPI: CPPC: add cppc enable register function Huang Rui
2021-11-19 10:30 ` [PATCH v4 06/22] cpufreq: amd: introduce a new amd pstate driver to support future processors Huang Rui
2021-11-19 10:46 ` Peter Zijlstra
2021-11-19 11:16 ` Huang Rui
2021-11-19 12:58 ` Peter Zijlstra
2021-11-25 15:03 ` Giovanni Gherdovich
2021-11-26 9:44 ` Huang Rui
2021-11-19 10:30 ` Huang Rui [this message]
2021-11-19 10:30 ` [PATCH v4 08/22] cpufreq: amd: introduce the support for the processors with shared memory solution Huang Rui
2021-11-19 10:30 ` [PATCH v4 09/22] cpufreq: amd: add trace for amd-pstate module Huang Rui
2021-11-19 10:30 ` [PATCH v4 10/22] cpufreq: amd: add boost mode support for amd-pstate Huang Rui
2021-11-19 10:30 ` [PATCH v4 11/22] cpufreq: amd: add amd-pstate frequencies attributes Huang Rui
2021-11-19 10:30 ` [PATCH v4 12/22] cpufreq: amd: add amd-pstate performance attributes Huang Rui
2021-11-19 10:30 ` [PATCH v4 13/22] cpupower: add AMD P-state capability flag Huang Rui
2021-11-19 10:30 ` [PATCH v4 14/22] cpupower: add the function to check amd-pstate enabled Huang Rui
2021-11-19 10:30 ` [PATCH v4 15/22] cpupower: initial AMD P-state capability Huang Rui
2021-11-19 10:30 ` [PATCH v4 16/22] cpupower: add the function to get the sysfs value from specific table Huang Rui
2021-11-19 20:38 ` Nathan Fontenot
2021-11-19 22:19 ` Juuso Alasuutari
2021-11-22 2:41 ` Huang Rui
2021-11-19 10:30 ` [PATCH v4 17/22] cpupower: introduce acpi cppc library Huang Rui
2021-11-19 10:30 ` [PATCH v4 18/22] cpupower: add amd-pstate sysfs definition and access helper Huang Rui
2021-11-19 10:30 ` [PATCH v4 19/22] cpupower: enable boost state support for amd-pstate module Huang Rui
2021-11-19 10:31 ` [PATCH v4 20/22] cpupower: move print_speed function into misc helper Huang Rui
2021-11-19 10:31 ` [PATCH v4 21/22] cpupower: print amd-pstate information on cpupower Huang Rui
2021-11-19 10:31 ` [PATCH v4 22/22] Documentation: amd-pstate: add amd-pstate driver introduction Huang Rui
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