linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: kernel test robot <lkp@intel.com>
To: Kai-Heng Feng <kai.heng.feng@canonical.com>,
	srinivas.pandruvada@linux.intel.com, lenb@kernel.org,
	rafael@kernel.org, viresh.kumar@linaro.org
Cc: kbuild-all@lists.01.org,
	Kai-Heng Feng <kai.heng.feng@canonical.com>,
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] cpufreq: intel_pstate: Avoid using CPPC when ACPI CPC is not valid
Date: Fri, 19 Nov 2021 14:30:26 +0800	[thread overview]
Message-ID: <202111191417.RVs36qkq-lkp@intel.com> (raw)
In-Reply-To: <20211118124553.599419-1-kai.heng.feng@canonical.com>

[-- Attachment #1: Type: text/plain, Size: 5904 bytes --]

Hi Kai-Heng,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on rafael-pm/linux-next]
[also build test ERROR on v5.16-rc1 next-20211118]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Kai-Heng-Feng/cpufreq-intel_pstate-Avoid-using-CPPC-when-ACPI-CPC-is-not-valid/20211118-204820
base:   https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git linux-next
config: i386-buildonly-randconfig-r006-20211119 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://github.com/0day-ci/linux/commit/a6f59fd494dbbef65364b58fad14c1368c728dea
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Kai-Heng-Feng/cpufreq-intel_pstate-Avoid-using-CPPC-when-ACPI-CPC-is-not-valid/20211118-204820
        git checkout a6f59fd494dbbef65364b58fad14c1368c728dea
        # save the attached .config to linux build tree
        make W=1 ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/cpufreq/intel_pstate.c: In function 'intel_pstate_init':
>> drivers/cpufreq/intel_pstate.c:3372:48: error: implicit declaration of function 'acpi_cpc_valid' [-Werror=implicit-function-declaration]
    3372 |    if (boot_cpu_has(X86_FEATURE_HYBRID_CPU) && acpi_cpc_valid())
         |                                                ^~~~~~~~~~~~~~
   At top level:
   drivers/cpufreq/intel_pstate.c:2352:32: warning: 'intel_pstate_cpu_oob_ids' defined but not used [-Wunused-const-variable=]
    2352 | static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
         |                                ^~~~~~~~~~~~~~~~~~~~~~~~
   cc1: some warnings being treated as errors


vim +/acpi_cpc_valid +3372 drivers/cpufreq/intel_pstate.c

  3334	
  3335	static int __init intel_pstate_init(void)
  3336	{
  3337		static struct cpudata **_all_cpu_data;
  3338		const struct x86_cpu_id *id;
  3339		int rc;
  3340	
  3341		if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
  3342			return -ENODEV;
  3343	
  3344		id = x86_match_cpu(hwp_support_ids);
  3345		if (id) {
  3346			bool hwp_forced = intel_pstate_hwp_is_enabled();
  3347	
  3348			if (hwp_forced)
  3349				pr_info("HWP enabled by BIOS\n");
  3350			else if (no_load)
  3351				return -ENODEV;
  3352	
  3353			copy_cpu_funcs(&core_funcs);
  3354			/*
  3355			 * Avoid enabling HWP for processors without EPP support,
  3356			 * because that means incomplete HWP implementation which is a
  3357			 * corner case and supporting it is generally problematic.
  3358			 *
  3359			 * If HWP is enabled already, though, there is no choice but to
  3360			 * deal with it.
  3361			 */
  3362			if ((!no_hwp && boot_cpu_has(X86_FEATURE_HWP_EPP)) || hwp_forced) {
  3363				WRITE_ONCE(hwp_active, 1);
  3364				hwp_mode_bdw = id->driver_data;
  3365				intel_pstate.attr = hwp_cpufreq_attrs;
  3366				intel_cpufreq.attr = hwp_cpufreq_attrs;
  3367				intel_cpufreq.flags |= CPUFREQ_NEED_UPDATE_LIMITS;
  3368				intel_cpufreq.adjust_perf = intel_cpufreq_adjust_perf;
  3369				if (!default_driver)
  3370					default_driver = &intel_pstate;
  3371	
> 3372				if (boot_cpu_has(X86_FEATURE_HYBRID_CPU) && acpi_cpc_valid())
  3373					intel_pstate_cppc_set_cpu_scaling();
  3374	
  3375				goto hwp_cpu_matched;
  3376			}
  3377			pr_info("HWP not enabled\n");
  3378		} else {
  3379			if (no_load)
  3380				return -ENODEV;
  3381	
  3382			id = x86_match_cpu(intel_pstate_cpu_ids);
  3383			if (!id) {
  3384				pr_info("CPU model not supported\n");
  3385				return -ENODEV;
  3386			}
  3387	
  3388			copy_cpu_funcs((struct pstate_funcs *)id->driver_data);
  3389		}
  3390	
  3391		if (intel_pstate_msrs_not_valid()) {
  3392			pr_info("Invalid MSRs\n");
  3393			return -ENODEV;
  3394		}
  3395		/* Without HWP start in the passive mode. */
  3396		if (!default_driver)
  3397			default_driver = &intel_cpufreq;
  3398	
  3399	hwp_cpu_matched:
  3400		/*
  3401		 * The Intel pstate driver will be ignored if the platform
  3402		 * firmware has its own power management modes.
  3403		 */
  3404		if (intel_pstate_platform_pwr_mgmt_exists()) {
  3405			pr_info("P-states controlled by the platform\n");
  3406			return -ENODEV;
  3407		}
  3408	
  3409		if (!hwp_active && hwp_only)
  3410			return -ENOTSUPP;
  3411	
  3412		pr_info("Intel P-state driver initializing\n");
  3413	
  3414		_all_cpu_data = vzalloc(array_size(sizeof(void *), num_possible_cpus()));
  3415		if (!_all_cpu_data)
  3416			return -ENOMEM;
  3417	
  3418		WRITE_ONCE(all_cpu_data, _all_cpu_data);
  3419	
  3420		intel_pstate_request_control_from_smm();
  3421	
  3422		intel_pstate_sysfs_expose_params();
  3423	
  3424		mutex_lock(&intel_pstate_driver_lock);
  3425		rc = intel_pstate_register_driver(default_driver);
  3426		mutex_unlock(&intel_pstate_driver_lock);
  3427		if (rc) {
  3428			intel_pstate_sysfs_remove();
  3429			return rc;
  3430		}
  3431	
  3432		if (hwp_active) {
  3433			const struct x86_cpu_id *id;
  3434	
  3435			id = x86_match_cpu(intel_pstate_cpu_ee_disable_ids);
  3436			if (id) {
  3437				set_power_ctl_ee_state(false);
  3438				pr_info("Disabling energy efficiency optimization\n");
  3439			}
  3440	
  3441			pr_info("HWP enabled\n");
  3442		} else if (boot_cpu_has(X86_FEATURE_HYBRID_CPU)) {
  3443			pr_warn("Problematic setup: Hybrid processor with disabled HWP\n");
  3444		}
  3445	
  3446		return 0;
  3447	}
  3448	device_initcall(intel_pstate_init);
  3449	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 39479 bytes --]

      parent reply	other threads:[~2021-11-19  6:31 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-18 12:45 [PATCH] cpufreq: intel_pstate: Avoid using CPPC when ACPI CPC is not valid Kai-Heng Feng
2021-11-18 13:14 ` Rafael J. Wysocki
2021-11-19  6:30 ` kernel test robot [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=202111191417.RVs36qkq-lkp@intel.com \
    --to=lkp@intel.com \
    --cc=kai.heng.feng@canonical.com \
    --cc=kbuild-all@lists.01.org \
    --cc=lenb@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=rafael@kernel.org \
    --cc=srinivas.pandruvada@linux.intel.com \
    --cc=viresh.kumar@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).