From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9F5DC433EF for ; Thu, 25 Nov 2021 15:29:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241314AbhKYPc6 (ORCPT ); Thu, 25 Nov 2021 10:32:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356110AbhKYPcU (ORCPT ); Thu, 25 Nov 2021 10:32:20 -0500 Received: from andre.telenet-ops.be (andre.telenet-ops.be [IPv6:2a02:1800:120:4::f00:15]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF98CC061378 for ; Thu, 25 Nov 2021 07:23:20 -0800 (PST) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:1511:ffa3:275:45dd]) by andre.telenet-ops.be with bizsmtp id NfPL2600N5CGg7701fPLHZ; Thu, 25 Nov 2021 16:23:20 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1mqGal-000DNq-Oi; Thu, 25 Nov 2021 16:23:19 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1mqGal-000gP7-Bs; Thu, 25 Nov 2021 16:23:19 +0100 From: Geert Uytterhoeven To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Palmer Dabbelt , Paul Walmsley , Anup Patel Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH] dt-bindings: timer: sifive,clint: Fix number of interrupts Date: Thu, 25 Nov 2021 16:23:17 +0100 Message-Id: <20211125152317.162958-1-geert@linux-m68k.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To improve human readability and enable automatic validation, the tuples in "interrupts-extended" properties should be grouped using angle brackets. As the DT bindings lack an upper bound on the number of interrupts, thus assuming one, proper grouping is currently flagged as an error. Fix this by adding the missing "maxItems", limiting it to 10 interrupts (two interrupts for a system management core, and two interrupts per core for other cores), which should be sufficient for now. Group the tuples in the example. Signed-off-by: Geert Uytterhoeven --- .../devicetree/bindings/timer/sifive,clint.yaml | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index a35952f487426988..55bec2d059807c48 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -43,6 +43,7 @@ properties: interrupts-extended: minItems: 1 + maxItems: 10 additionalProperties: false @@ -55,10 +56,10 @@ examples: - | timer@2000000 { compatible = "sifive,fu540-c000-clint", "sifive,clint0"; - interrupts-extended = <&cpu1intc 3 &cpu1intc 7 - &cpu2intc 3 &cpu2intc 7 - &cpu3intc 3 &cpu3intc 7 - &cpu4intc 3 &cpu4intc 7>; + interrupts-extended = <&cpu1intc 3>, <&cpu1intc 7>, + <&cpu2intc 3>, <&cpu2intc 7>, + <&cpu3intc 3>, <&cpu3intc 7>, + <&cpu4intc 3>, <&cpu4intc 7>; reg = <0x2000000 0x10000>; }; ... -- 2.25.1