From: Lai Jiangshan <jiangshanlai@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, Lai Jiangshan <laijs@linux.alibaba.com>,
Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H. Peter Anvin" <hpa@zytor.com>
Subject: [PATCH V6 46/49] x86/entry: Remove ASM function paranoid_entry() and paranoid_exit()
Date: Fri, 26 Nov 2021 18:12:06 +0800 [thread overview]
Message-ID: <20211126101209.8613-47-jiangshanlai@gmail.com> (raw)
In-Reply-To: <20211126101209.8613-1-jiangshanlai@gmail.com>
From: Lai Jiangshan <laijs@linux.alibaba.com>
IST exceptions are changed to use C entry code which uses the C function
ist_paranoid_entry() and ist_paranoid_exit(). The ASM function
paranoid_entry() and paranoid_exit() are useless.
Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
---
arch/x86/entry/entry_64.S | 126 --------------------------------------
1 file changed, 126 deletions(-)
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 614e6cbb871b..a583089e88c1 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -848,132 +848,6 @@ SYM_CODE_START(xen_failsafe_callback)
SYM_CODE_END(xen_failsafe_callback)
#endif /* CONFIG_XEN_PV */
-/*
- * Save all registers in pt_regs. Return GSBASE related information
- * in EBX depending on the availability of the FSGSBASE instructions:
- *
- * FSGSBASE R/EBX
- * N 0 -> SWAPGS on exit
- * 1 -> no SWAPGS on exit
- *
- * Y GSBASE value at entry, must be restored in paranoid_exit
- */
-SYM_CODE_START_LOCAL(paranoid_entry)
- UNWIND_HINT_FUNC
-
- /*
- * Always stash CR3 in %r14. This value will be restored,
- * verbatim, at exit. Needed if paranoid_entry interrupted
- * another entry that already switched to the user CR3 value
- * but has not yet returned to userspace.
- *
- * This is also why CS (stashed in the "iret frame" by the
- * hardware at entry) can not be used: this may be a return
- * to kernel code, but with a user CR3 value.
- *
- * Switching CR3 does not depend on kernel GSBASE so it can
- * be done before switching to the kernel GSBASE. This is
- * required for FSGSBASE because the kernel GSBASE has to
- * be retrieved from a kernel internal table.
- */
- SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg=%rax save_reg=%r14
-
- /*
- * Handling GSBASE depends on the availability of FSGSBASE.
- *
- * Without FSGSBASE the kernel enforces that negative GSBASE
- * values indicate kernel GSBASE. With FSGSBASE no assumptions
- * can be made about the GSBASE value when entering from user
- * space.
- */
- ALTERNATIVE "jmp .Lparanoid_entry_checkgs", "", X86_FEATURE_FSGSBASE
-
- /*
- * Read the current GSBASE and store it in %rbx unconditionally,
- * retrieve and set the current CPUs kernel GSBASE. The stored value
- * has to be restored in paranoid_exit unconditionally.
- *
- * The unconditional write to GS base below ensures that no subsequent
- * loads based on a mispredicted GS base can happen, therefore no LFENCE
- * is needed here.
- */
- SAVE_AND_SET_GSBASE scratch_reg=%rax save_reg=%rbx
- ret
-
-.Lparanoid_entry_checkgs:
- /* EBX = 1 -> kernel GSBASE active, no restore required */
- movl $1, %ebx
- /*
- * The kernel-enforced convention is a negative GSBASE indicates
- * a kernel value. No SWAPGS needed on entry and exit.
- */
- movl $MSR_GS_BASE, %ecx
- rdmsr
- testl %edx, %edx
- js .Lparanoid_kernel_gsbase
-
- /* EBX = 0 -> SWAPGS required on exit */
- xorl %ebx, %ebx
- swapgs
-.Lparanoid_kernel_gsbase:
-
- /*
- * The above SAVE_AND_SWITCH_TO_KERNEL_CR3 macro doesn't do an
- * unconditional CR3 write, even in the PTI case. So do an lfence
- * to prevent GS speculation, regardless of whether PTI is enabled.
- */
- FENCE_SWAPGS_KERNEL_ENTRY
- ret
-SYM_CODE_END(paranoid_entry)
-
-/*
- * "Paranoid" exit path from exception stack. This is invoked
- * only on return from IST interrupts that came from kernel space.
- *
- * We may be returning to very strange contexts (e.g. very early
- * in syscall entry), so checking for preemption here would
- * be complicated. Fortunately, there's no good reason to try
- * to handle preemption here.
- *
- * R/EBX contains the GSBASE related information depending on the
- * availability of the FSGSBASE instructions:
- *
- * FSGSBASE R/EBX
- * N 0 -> SWAPGS on exit
- * 1 -> no SWAPGS on exit
- *
- * Y User space GSBASE, must be restored unconditionally
- */
-SYM_CODE_START_LOCAL(paranoid_exit)
- UNWIND_HINT_REGS offset=8
- /*
- * The order of operations is important. RESTORE_CR3 requires
- * kernel GSBASE.
- *
- * NB to anyone to try to optimize this code: this code does
- * not execute at all for exceptions from user mode. Those
- * exceptions go through error_exit instead.
- */
- RESTORE_CR3 scratch_reg=%rax save_reg=%r14
-
- /* Handle the three GSBASE cases */
- ALTERNATIVE "jmp .Lparanoid_exit_checkgs", "", X86_FEATURE_FSGSBASE
-
- /* With FSGSBASE enabled, unconditionally restore GSBASE */
- wrgsbase %rbx
- ret
-
-.Lparanoid_exit_checkgs:
- /* On non-FSGSBASE systems, conditionally do SWAPGS */
- testl %ebx, %ebx
- jnz .Lparanoid_exit_done
-
- /* We are returning to a context with user GSBASE */
- swapgs
-.Lparanoid_exit_done:
- ret
-SYM_CODE_END(paranoid_exit)
-
SYM_CODE_START_LOCAL(error_return)
UNWIND_HINT_REGS
DEBUG_ENTRY_ASSERT_IRQS_OFF
--
2.19.1.6.gb485710b
next prev parent reply other threads:[~2021-11-26 10:28 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 10:11 [PATCH V6 00/49] x86/entry/64: Convert a bunch of ASM entry code into C code Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 01/49] x86/entry: Add fence for kernel entry swapgs in paranoid_entry() Lai Jiangshan
2021-12-04 11:45 ` [tip: x86/urgent] x86/entry: Add a fence for kernel entry SWAPGS " tip-bot2 for Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 02/49] x86/entry: Use the correct fence macro after swapgs in kernel CR3 Lai Jiangshan
2021-12-04 11:45 ` [tip: x86/urgent] " tip-bot2 for Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 03/49] x86/xen: Add xenpv_restore_regs_and_return_to_usermode() Lai Jiangshan
2021-12-04 11:45 ` [tip: x86/urgent] " tip-bot2 for Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 04/49] x86/entry: Use swapgs and native_iret directly in swapgs_restore_regs_and_return_to_usermode Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 05/49] compiler_types.h: Add __noinstr_section() for noinstr Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 06/49] x86/entry: Introduce __entry_text for entry code written in C Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 07/49] x86/entry: Move PTI_USER_* to arch/x86/include/asm/processor-flags.h Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 08/49] x86: Remove unused kernel_to_user_p4dp() and user_to_kernel_p4dp() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 09/49] x86: Replace PTI_PGTABLE_SWITCH_BIT with PTI_USER_PGTABLE_BIT Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 10/49] x86: Mark __native_read_cr3() & native_write_cr3() as __always_inline Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 11/49] x86/traps: Move the declaration of native_irq_return_iret into proto.h Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 12/49] x86/entry: Add arch/x86/entry/entry64.c for C entry code Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 13/49] x86/entry: Expose the address of .Lgs_change to entry64.c Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 14/49] x86/entry: Add C verion of SWITCH_TO_KERNEL_CR3 as switch_to_kernel_cr3() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 15/49] x86/traps: Add fence_swapgs_{user,kernel}_entry() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 16/49] x86/entry: Add C user_entry_swapgs_and_fence() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 17/49] x86/traps: Move pt_regs only in fixup_bad_iret() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 18/49] x86/entry: Switch the stack after error_entry() returns Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 19/49] x86/entry: move PUSH_AND_CLEAR_REGS out of error_entry Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 20/49] x86/entry: Move cld to the start of idtentry Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 21/49] x86/entry: Don't call error_entry for XENPV Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 22/49] x86/entry: Convert SWAPGS to swapgs in error_entry() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 23/49] x86/entry: Implement the whole error_entry() as C code Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 24/49] x86/entry: Use idtentry macro for entry_INT80_compat Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 25/49] x86/entry: Convert SWAPGS to swapgs in entry_SYSENTER_compat() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 26/49] x86: Remove the definition of SWAPGS Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 27/49] x86/entry: Make paranoid_exit() callable Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 28/49] x86/entry: Call paranoid_exit() in asm_exc_nmi() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 29/49] x86/entry: move PUSH_AND_CLEAR_REGS out of paranoid_entry Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 30/49] x86/entry: Add the C version ist_switch_to_kernel_cr3() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 31/49] x86/entry: Skip CR3 write when the saved CR3 is kernel CR3 in RESTORE_CR3 Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 32/49] x86/entry: Add the C version ist_restore_cr3() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 33/49] x86/entry: Add the C version get_percpu_base() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 34/49] x86/entry: Add the C version ist_switch_to_kernel_gsbase() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 35/49] x86/entry: Implement the C version ist_paranoid_entry() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 36/49] x86/entry: Implement the C version ist_paranoid_exit() Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 37/49] x86/entry: Add a C macro to define the function body for IST in .entry.text Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 38/49] x86/debug, mce: Use C entry code Lai Jiangshan
2021-11-26 10:11 ` [PATCH V6 39/49] x86/idtentry.h: Move the definitions *IDTENTRY_{MCE|DEBUG}* up Lai Jiangshan
2021-11-26 10:12 ` [PATCH V6 40/49] x86/nmi: Use DEFINE_IDTENTRY_NMI for nmi Lai Jiangshan
2021-11-26 10:12 ` [PATCH V6 41/49] x86/nmi: Use C entry code Lai Jiangshan
2021-11-26 10:12 ` [PATCH V6 42/49] x86/entry: Add a C macro to define the function body for IST in .entry.text with an error code Lai Jiangshan
2021-11-26 10:12 ` [PATCH V6 43/49] x86/doublefault: Use C entry code Lai Jiangshan
2021-11-26 10:12 ` [PATCH V6 44/49] x86/sev: Add and use ist_vc_switch_off_ist() Lai Jiangshan
2021-11-26 10:12 ` [PATCH V6 45/49] x86/sev: Use C entry code Lai Jiangshan
2021-11-26 10:12 ` Lai Jiangshan [this message]
2021-11-26 10:12 ` [PATCH V6 47/49] x86/entry: Remove the unused ASM macros Lai Jiangshan
2021-11-26 10:12 ` [PATCH V6 48/49] x86/entry: Remove save_ret from PUSH_AND_CLEAR_REGS Lai Jiangshan
2021-11-26 10:12 ` [PATCH V6 49/49] x86/syscall/64: Move the checking for sysret to C code Lai Jiangshan
2021-11-27 17:46 ` [PATCH V6 00/49] x86/entry/64: Convert a bunch of ASM entry code into " Damian Tometzki
2021-12-03 9:31 ` Lai Jiangshan
2021-12-03 9:39 ` Borislav Petkov
2021-12-03 10:10 ` Lai Jiangshan
2021-12-03 10:18 ` Borislav Petkov
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