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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id e29sm9354659pge.17.2021.11.29.18.50.00 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 29 Nov 2021 18:50:02 -0800 (PST) Date: Tue, 30 Nov 2021 10:49:57 +0800 From: Shawn Guo To: Rob Herring Cc: Georgi Djakov , Bjorn Andersson , Loic Poulain , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 5/6] dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support Message-ID: <20211130024956.GE10105@dragon> References: <20211122085123.21049-1-shawn.guo@linaro.org> <20211122085123.21049-6-shawn.guo@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 29, 2021 at 08:23:20PM -0600, Rob Herring wrote: > On Mon, Nov 22, 2021 at 04:51:22PM +0800, Shawn Guo wrote: > > Add bindings for Qualcomm QCM2290 Network-On-Chip interconnect devices. > > > > Signed-off-by: Shawn Guo > > --- > > .../bindings/interconnect/qcom,qcm2290.yaml | 116 ++++++++++++++++++ > > .../dt-bindings/interconnect/qcom,qcm2290.h | 94 ++++++++++++++ > > 2 files changed, 210 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml > > create mode 100644 include/dt-bindings/interconnect/qcom,qcm2290.h > > > > diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml b/Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml > > new file mode 100644 > > index 000000000000..fb5e62196d9a > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml > > @@ -0,0 +1,116 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/interconnect/qcom,qcm2290.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm QCM2290 Network-On-Chip interconnect > > + > > +maintainers: > > + - Shawn Guo > > + > > +description: | > > + The Qualcomm QCM2290 interconnect providers support adjusting the > > + bandwidth requirements between the various NoC fabrics. > > + > > +properties: > > + reg: > > + maxItems: 1 > > + > > + compatible: > > + enum: > > + - qcom,qcm2290-bimc > > + - qcom,qcm2290-cnoc > > + - qcom,qcm2290-snoc > > + - qcom,qcm2290-qup-virt > > + - qcom,qcm2290-mmrt-virt > > + - qcom,qcm2290-mmnrt-virt > > + > > + '#interconnect-cells': > > + const: 1 > > + > > + clock-names: > > + items: > > + - const: bus > > + - const: bus_a > > + > > + clocks: > > + items: > > + - description: Bus Clock > > + - description: Bus A Clock > > + > > +required: > > + - compatible > > + - '#interconnect-cells' > > + - clock-names > > + - clocks > > + > > +additionalProperties: true > > Nope. You have to define the child nodes. Thanks for spotting it! Will fix. > Though the 'virt' looks > suspicious. They are interconnect providers which do not have a separate QoS register space, but do have corresponding bus clocks to scale. They are named as 'virt' by following downstream and qcom,rpmh.yaml binding. Shawn