From: Stephane Eranian <eranian@google.com>
To: linux-kernel@vger.kernel.org
Cc: peterz@infradead.org, kim.phillips@amd.com, acme@redhat.com,
jolsa@redhat.com, songliubraving@fb.com, mpe@ellerman.id.au,
maddy@linux.ibm.com
Subject: [PATCH v3 07/13] perf/x86/amd: make Zen3 branch sampling opt-in
Date: Tue, 30 Nov 2021 17:02:11 -0800 [thread overview]
Message-ID: <20211201010217.886919-8-eranian@google.com> (raw)
In-Reply-To: <20211201010217.886919-1-eranian@google.com>
This patch adds a kernel config option to make support
for AMD Zen3 Branch Sampling (BRS) an opt-in compile
time option.
Signed-off-by: Stephane Eranian <eranian@google.com>
---
arch/x86/events/Kconfig | 8 ++++++
arch/x86/events/amd/Makefile | 3 ++-
arch/x86/events/perf_event.h | 49 ++++++++++++++++++++++++++++--------
3 files changed, 49 insertions(+), 11 deletions(-)
diff --git a/arch/x86/events/Kconfig b/arch/x86/events/Kconfig
index d6cdfe631674..1dc002ef66da 100644
--- a/arch/x86/events/Kconfig
+++ b/arch/x86/events/Kconfig
@@ -44,4 +44,12 @@ config PERF_EVENTS_AMD_UNCORE
To compile this driver as a module, choose M here: the
module will be called 'amd-uncore'.
+
+config PERF_EVENTS_AMD_BRS
+ depends on PERF_EVENTS && CPU_SUP_AMD
+ tristate "AMD Zen3 Branch Sampling support"
+ help
+ Enable AMD Zen3 branch sampling support (BRS) which samples up to
+ 16 consecutive taken branches in registers.
+
endmenu
diff --git a/arch/x86/events/amd/Makefile b/arch/x86/events/amd/Makefile
index cf323ffab5cd..b9f5d4610256 100644
--- a/arch/x86/events/amd/Makefile
+++ b/arch/x86/events/amd/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_CPU_SUP_AMD) += core.o brs.o
+obj-$(CONFIG_CPU_SUP_AMD) += core.o
+obj-$(CONFIG_PERF_EVENTS_AMD_BRS) += brs.o
obj-$(CONFIG_PERF_EVENTS_AMD_POWER) += power.o
obj-$(CONFIG_X86_LOCAL_APIC) += ibs.o
obj-$(CONFIG_PERF_EVENTS_AMD_UNCORE) += amd-uncore.o
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index 74552845d942..a4715bfcb801 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -1212,6 +1212,8 @@ static inline bool fixed_counter_disabled(int i, struct pmu *pmu)
#ifdef CONFIG_CPU_SUP_AMD
int amd_pmu_init(void);
+
+#ifdef CONFIG_PERF_EVENTS_AMD_BRS
int amd_brs_init(void);
void amd_brs_disable(void);
void amd_brs_enable(void);
@@ -1246,25 +1248,52 @@ static inline void amd_pmu_brs_del(struct perf_event *event)
void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in);
-/*
- * check if BRS is activated on the CPU
- * active defined as it has non-zero users and DBG_EXT_CFG.BRSEN=1
- */
-static inline bool amd_brs_active(void)
+static inline s64 amd_brs_adjust_period(s64 period)
{
- struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
+ if (period > x86_pmu.lbr_nr)
+ return period - x86_pmu.lbr_nr;
- return cpuc->brs_active;
+ return period;
+}
+#else
+static inline int amd_brs_init(void)
+{
+ return 0;
}
+static inline void amd_brs_disable(void) {}
+static inline void amd_brs_enable(void) {}
+static inline void amd_brs_drain(void) {}
+static inline void amd_brs_lopwr_init(void) {}
+static inline void amd_brs_disable_all(void) {}
+static inline int amd_brs_setup_filter(struct perf_event *event)
+{
+ return 0;
+}
+static inline void amd_brs_reset(void) {}
-static inline s64 amd_brs_adjust_period(s64 period)
+static inline void amd_pmu_brs_add(struct perf_event *event)
{
- if (period > x86_pmu.lbr_nr)
- return period - x86_pmu.lbr_nr;
+}
+
+static inline void amd_pmu_brs_del(struct perf_event *event)
+{
+}
+
+static inline void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in)
+{
+}
+static inline s64 amd_brs_adjust_period(s64 period)
+{
return period;
}
+static inline void amd_brs_enable_all(void)
+{
+}
+
+#endif
+
#else /* CONFIG_CPU_SUP_AMD */
static inline int amd_pmu_init(void)
--
2.34.0.rc2.393.gf8c9666880-goog
next prev parent reply other threads:[~2021-12-01 1:02 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-01 1:02 [PATCH v3 00/13] perf/x86/amd: Add AMD Fam19h Branch Sampling support Stephane Eranian
2021-12-01 1:02 ` [PATCH v3 01/13] perf/core: add perf_clear_branch_entry_bitfields() helper Stephane Eranian
2021-12-01 1:02 ` [PATCH v3 02/13] x86/cpufeatures: add AMD Fam19h Branch Sampling feature Stephane Eranian
2021-12-01 1:02 ` [PATCH v3 03/13] perf/x86/amd: add AMD Fam19h Branch Sampling support Stephane Eranian
2021-12-01 4:02 ` kernel test robot
2021-12-01 8:08 ` kernel test robot
2021-12-01 1:02 ` [PATCH v3 04/13] perf/x86/amd: add branch-brs helper event for Fam19h BRS Stephane Eranian
2021-12-01 1:02 ` [PATCH v3 05/13] perf/x86/amd: enable branch sampling priv level filtering Stephane Eranian
2021-12-01 1:02 ` [PATCH v3 06/13] perf/x86/amd: add AMD branch sampling period adjustment Stephane Eranian
2021-12-01 1:02 ` Stephane Eranian [this message]
2021-12-01 1:02 ` [PATCH v3 08/13] ACPI: add perf low power callback Stephane Eranian
2021-12-01 6:14 ` kernel test robot
2021-12-01 1:02 ` [PATCH v3 09/13] perf/x86/amd: add idle hooks for branch sampling Stephane Eranian
2021-12-01 1:02 ` [PATCH v3 10/13] perf tools: add branch-brs as a new event Stephane Eranian
2021-12-01 1:02 ` [PATCH v3 11/13] perf tools: improve IBS error handling Stephane Eranian
2021-12-01 15:30 ` Kim Phillips
2021-12-01 20:40 ` Stephane Eranian
2021-12-01 23:05 ` Kim Phillips
2021-12-01 1:02 ` [PATCH v3 12/13] perf tools: improve error handling of AMD Branch Sampling Stephane Eranian
2021-12-01 1:02 ` [PATCH v3 13/13] perf report: add addr_from/addr_to sort dimensions Stephane Eranian
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211201010217.886919-8-eranian@google.com \
--to=eranian@google.com \
--cc=acme@redhat.com \
--cc=jolsa@redhat.com \
--cc=kim.phillips@amd.com \
--cc=linux-kernel@vger.kernel.org \
--cc=maddy@linux.ibm.com \
--cc=mpe@ellerman.id.au \
--cc=peterz@infradead.org \
--cc=songliubraving@fb.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).