From: Mao Jinlong <quic_jinlmao@quicinc.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Mao Jinlong <quic_jinlmao@quicinc.com>,
Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
<coresight@lists.linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
Tingwei Zhang <quic_tingweiz@quicinc.com>,
Yuanfang Zhang <quic_yuanfang@quicinc.com>,
Tao Zhang <quic_taozha@quicinc.com>,
Trilok Soni <quic_tsoni@quicinc.com>,
<linux-arm-msm@vger.kernel.org>
Subject: [PATCH v2 4/9] coresight-tpdm: Add DSB dataset support
Date: Thu, 9 Dec 2021 22:15:38 +0800 [thread overview]
Message-ID: <20211209141543.21314-5-quic_jinlmao@quicinc.com> (raw)
In-Reply-To: <20211209141543.21314-1-quic_jinlmao@quicinc.com>
TPDM serves as data collection component for various dataset types.
DSB(Discrete Single Bit) is one of the dataset types. DSB subunit
can be enabled for data collection by writing 1 to the first bit of
DSB_CR register. This change is to add enable/disable function for
DSB dataset by writing DSB_CR register.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
drivers/hwtracing/coresight/coresight-tpdm.c | 56 ++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 23 ++++++++
2 files changed, 79 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
index f494cef4fb24..c0dd216f70eb 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.c
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -20,6 +20,27 @@
DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm");
+static void tpdm_enable_dsb(struct tpdm_drvdata *drvdata)
+{
+ u32 val;
+
+ /* Set the enable bit of DSB control register to 1 */
+ val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
+ val = val | BIT(0);
+ writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
+}
+
+static void _tpdm_enable(struct tpdm_drvdata *drvdata)
+{
+ CS_UNLOCK(drvdata->base);
+
+ /* Check if DSB datasets is present for TPDM. */
+ if (test_bit(TPDM_DS_DSB, drvdata->datasets))
+ tpdm_enable_dsb(drvdata);
+
+ CS_LOCK(drvdata->base);
+}
+
static int tpdm_enable(struct coresight_device *csdev,
struct perf_event *event, u32 mode)
{
@@ -31,6 +52,7 @@ static int tpdm_enable(struct coresight_device *csdev,
return -EBUSY;
}
+ _tpdm_enable(drvdata);
drvdata->enable = true;
mutex_unlock(&drvdata->lock);
@@ -38,6 +60,28 @@ static int tpdm_enable(struct coresight_device *csdev,
return 0;
}
+static void tpdm_disable_dsb(struct tpdm_drvdata *drvdata)
+{
+ u32 val;
+
+ /* Set the enable bit of DSB control register to 0 */
+ val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
+ val = val & ~BIT(0);
+ writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
+}
+
+static void _tpdm_disable(struct tpdm_drvdata *drvdata)
+{
+ CS_UNLOCK(drvdata->base);
+
+ /* Check if DSB datasets is present for TPDM. */
+ if (test_bit(TPDM_DS_DSB, drvdata->datasets))
+ tpdm_disable_dsb(drvdata);
+
+ CS_LOCK(drvdata->base);
+
+}
+
static void tpdm_disable(struct coresight_device *csdev,
struct perf_event *event)
{
@@ -49,6 +93,7 @@ static void tpdm_disable(struct coresight_device *csdev,
return;
}
+ _tpdm_disable(drvdata);
drvdata->enable = false;
mutex_unlock(&drvdata->lock);
@@ -75,8 +120,19 @@ static const struct coresight_ops tpdm_cs_ops = {
static void tpdm_init_default_data(struct tpdm_drvdata *drvdata)
{
static int traceid = TPDM_TRACE_ID_START;
+ int i;
+ u32 pidr;
+ CS_UNLOCK(drvdata->base);
drvdata->traceid = traceid++;
+
+ /* Get the datasets present on the TPDM. */
+ pidr = readl_relaxed(drvdata->base + CORESIGHT_PERIPHIDR0);
+ for (i = 0; i < TPDM_DATASETS; i++) {
+ if (pidr & BIT(i))
+ __set_bit(i, drvdata->datasets);
+ }
+ CS_LOCK(drvdata->base);
}
static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h
index 980ae90ff1c8..ba99c20e12bb 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.h
+++ b/drivers/hwtracing/coresight/coresight-tpdm.h
@@ -8,6 +8,27 @@
/* Default value of the traceid */
#define TPDM_TRACE_ID_START 128
+/* The max number of the datasets that TPDM supports */
+#define TPDM_DATASETS 7
+
+/* DSB Subunit Registers */
+#define TPDM_DSB_CR (0x780)
+
+/**
+ * This enum is for PERIPHIDR0 register of TPDM.
+ * The fields [6:0] of PERIPHIDR0 are used to determine what
+ * interfaces and subunits are present on a given TPDM.
+ *
+ * PERIPHIDR0[0] : Fix to 1 if ImplDef subunit present, else 0.
+ * No TPDM supports ImplDef subunit now. But
+ * the first bit of PERIPHIDR0 is for ImplDef
+ * subunit for initial design.
+ * PERIPHIDR0[1] : Fix to 1 if DSB subunit present, else 0.
+ */
+enum tpdm_dataset {
+ TPDM_DS_IMPLDEF,
+ TPDM_DS_DSB,
+};
/**
* struct tpdm_drvdata - specifics associated to an TPDM component
@@ -16,6 +37,7 @@
* @csdev: component vitals needed by the framework.
* @lock: lock for the enable value.
* @enable: enable status of the component.
+ * @datasets: The datasets types present of the TPDM.
* @traceid: value of the current ID for this component.
*/
@@ -25,6 +47,7 @@ struct tpdm_drvdata {
struct coresight_device *csdev;
struct mutex lock;
bool enable;
+ DECLARE_BITMAP(datasets, TPDM_DATASETS);
int traceid;
};
--
2.17.1
next prev parent reply other threads:[~2021-12-09 14:17 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-09 14:15 [PATCH v2 0/9] Coresight: Add support for TPDM and TPDA Mao Jinlong
2021-12-09 14:15 ` [PATCH v2 1/9] Use IDR to maintain all the enabled sources' paths Mao Jinlong
2021-12-14 18:30 ` Mathieu Poirier
2021-12-15 15:40 ` Jinlong Mao
2021-12-09 14:15 ` [PATCH v2 2/9] Coresight: Add coresight TPDM source driver Mao Jinlong
2021-12-14 18:57 ` Mathieu Poirier
2021-12-15 16:10 ` Jinlong Mao
2021-12-16 17:45 ` Mike Leach
2021-12-16 19:02 ` Mathieu Poirier
2022-01-21 14:01 ` Jinlong Mao
2022-01-21 17:15 ` Mathieu Poirier
2022-01-26 7:07 ` Jinlong Mao
2022-01-26 15:34 ` Mathieu Poirier
2022-01-27 9:33 ` Jinlong Mao
2022-01-27 18:15 ` Mathieu Poirier
2021-12-09 14:15 ` [PATCH v2 3/9] dt-bindings: arm: Adds CoreSight TPDM hardware definitions Mao Jinlong
2021-12-09 14:15 ` Mao Jinlong [this message]
2021-12-09 14:15 ` [PATCH v2 5/9] coresight-tpdm: Add integration test support Mao Jinlong
2021-12-09 14:15 ` [PATCH v2 6/9] docs: sysfs: coresight: Add sysfs ABI documentation for TPDM Mao Jinlong
2021-12-09 14:25 ` Jinlong Mao
2021-12-09 18:34 ` Trilok Soni
2021-12-10 1:03 ` Jinlong Mao
2021-12-17 16:09 ` Greg Kroah-Hartman
2021-12-09 14:15 ` [PATCH v2 7/9] Coresight: Add TPDA link driver Mao Jinlong
2021-12-09 14:15 ` [PATCH v2 8/9] dt-bindings: arm: Adds CoreSight TPDA hardware definitions Mao Jinlong
2021-12-09 14:15 ` [PATCH v2 9/9] ARM: dts: msm: Add coresight components for SM8250 Mao Jinlong
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