From: Thierry Reding <thierry.reding@gmail.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Rob Herring <robh+dt@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>
Cc: Jon Hunter <jonathanh@nvidia.com>,
linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 1/6] dt-bindings: memory: tegra: Document #interconnect-cells property
Date: Fri, 10 Dec 2021 17:47:36 +0100 [thread overview]
Message-ID: <20211210164741.881161-2-thierry.reding@gmail.com> (raw)
In-Reply-To: <20211210164741.881161-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
The #interconnect-cells properties are required to hook up memory
clients to the MC/EMC in interconnects properties. Add a description for
these properties.
Also, allow multiple reg and interrupt entries required by Tegra194 and
later.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- drop incomplete BPMP snippet from example
- explicitly set minItems for reg property
- describe MC and EMC general interrupts
.../nvidia,tegra186-mc.yaml | 78 ++++++++++++++++---
1 file changed, 67 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
index 611bda38d187..b496564b1bdf 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
@@ -33,10 +33,12 @@ properties:
- nvidia,tegra194-mc
reg:
- maxItems: 1
+ minItems: 1
+ maxItems: 3
interrupts:
- maxItems: 1
+ items:
+ - description: MC general interrupt
"#address-cells":
const: 2
@@ -48,6 +50,9 @@ properties:
dma-ranges: true
+ "#interconnect-cells":
+ const: 1
+
patternProperties:
"^external-memory-controller@[0-9a-f]+$":
description:
@@ -65,10 +70,12 @@ patternProperties:
- nvidia,tegra194-emc
reg:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
interrupts:
- maxItems: 1
+ items:
+ - description: EMC general interrupt
clocks:
items:
@@ -78,11 +85,65 @@ patternProperties:
items:
- const: emc
+ "#interconnect-cells":
+ const: 0
+
nvidia,bpmp:
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle of the node representing the BPMP
+ allOf:
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra186-emc
+ then:
+ properties:
+ reg:
+ maxItems: 1
+
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra194-emc
+ then:
+ properties:
+ reg:
+ minItems: 2
+
+ additionalProperties: false
+
+ required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - "#interconnect-cells"
+ - nvidia,bpmp
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra186-mc
+ then:
+ properties:
+ reg:
+ maxItems: 1
+
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra194-mc
+ then:
+ properties:
+ reg:
+ minItems: 3
+
+additionalProperties: false
+
required:
- compatible
- reg
@@ -90,8 +151,6 @@ required:
- "#address-cells"
- "#size-cells"
-additionalProperties: false
-
examples:
- |
#include <dt-bindings/clock/tegra186-clock.h>
@@ -124,12 +183,9 @@ examples:
clocks = <&bpmp TEGRA186_CLK_EMC>;
clock-names = "emc";
+ #interconnect-cells = <0>;
+
nvidia,bpmp = <&bpmp>;
};
};
};
-
- bpmp: bpmp {
- compatible = "nvidia,tegra186-bpmp";
- #clock-cells = <1>;
- };
--
2.34.1
next prev parent reply other threads:[~2021-12-10 16:47 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-10 16:47 [PATCH v2 0/6] memory: tegra: Add Tegra234 support Thierry Reding
2021-12-10 16:47 ` Thierry Reding [this message]
2021-12-12 18:50 ` [PATCH v2 1/6] dt-bindings: memory: tegra: Document #interconnect-cells property Krzysztof Kozlowski
2021-12-13 16:18 ` Thierry Reding
2021-12-10 16:47 ` [PATCH v2 2/6] dt-bindings: memory: tegra: Add Tegra234 support Thierry Reding
2021-12-12 18:46 ` Krzysztof Kozlowski
2021-12-13 16:21 ` Thierry Reding
2021-12-10 16:47 ` [PATCH v2 3/6] " Thierry Reding
2021-12-10 16:47 ` [PATCH v2 4/6] arm64: tegra: Add EMC general interrupt on Tegra194 Thierry Reding
2021-12-10 16:47 ` [PATCH v2 5/6] arm64: tegra: Add memory controller on Tegra234 Thierry Reding
2021-12-10 16:47 ` [PATCH v2 6/6] arm64: tegra: Hook up MMC and BPMP to memory controller Thierry Reding
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211210164741.881161-2-thierry.reding@gmail.com \
--to=thierry.reding@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).