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From: Fenghua Yu <fenghua.yu@intel.com>
To: "Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Andy Lutomirski" <luto@kernel.org>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"Tony Luck" <tony.luck@intel.com>,
	"Lu Baolu" <baolu.lu@linux.intel.com>,
	"Joerg Roedel" <joro@8bytes.org>,
	Josh Poimboeuf <jpoimboe@redhat.com>,
	"Jacob Pan" <jacob.jun.pan@linux.intel.com>,
	"Ashok Raj" <ashok.raj@intel.com>,
	"Ravi V Shankar" <ravi.v.shankar@intel.com>
Cc: iommu@lists.linux-foundation.org, "x86" <x86@kernel.org>,
	"linux-kernel" <linux-kernel@vger.kernel.org>,
	Fenghua Yu <fenghua.yu@intel.com>
Subject: [PATCH v2 06/11] x86/fpu: Clear PASID when copying fpstate
Date: Fri, 17 Dec 2021 22:01:31 +0000	[thread overview]
Message-ID: <20211217220136.2762116-7-fenghua.yu@intel.com> (raw)
In-Reply-To: <20211217220136.2762116-1-fenghua.yu@intel.com>

The kernel must allocate a Process Address Space ID (PASID) on behalf of
each process which will use ENQCMD and program it into the new MSR to
communicate the process identity to platform hardware. ENQCMD uses the
PASID stored in this MSR to tag requests from this process.

The PASID state must be cleared on fork() since fork creates a
new address space.

For clone(), it would be functionally OK to copy the PASID. However,
clearing it is _also_ functionally OK since any PASID use will trigger
the #GP handler to populate the MSR.

Copying the PASID state has two main downsides:
 * It requires differentiating fork() and clone() in the code,
   both in the FPU code and keeping tsk->pasid_activated consistent.
 * It guarantees that the PASID is out of its init state, which
   incurs small but non-zero cost on every XSAVE/XRSTOR.

The main downside of clearing the PASID at fpstate copy is the future,
one-time #GP for the thread.

Use the simplest approach: clear the PASID state both on clone() and
fork().  Rely on the #GP handler for MSR population in children.

Also, just clear the PASID bit from xfeatures if XSAVE is supported.
This will have no effect on systems that do not have PASID support.  It
is virtually zero overhead because 'dst_fpu' was just written and
the whole thing is cache hot.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
---
v2:
- Rewrite changelog (Dave Hansen).
- Move xfeature tweaking into fpu_clone() and make it unconditional
  if XSAVE is supported (Dave Hansen).

 arch/x86/kernel/fpu/core.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index 8ea306b1bf8e..13fc0ea52237 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -518,6 +518,13 @@ int fpu_clone(struct task_struct *dst, unsigned long clone_flags)
 		fpu_inherit_perms(dst_fpu);
 	fpregs_unlock();
 
+	/*
+	 * Children never inherit PASID state.
+	 * Force it to have its init value:
+	 */
+	if (use_xsave())
+		dst_fpu->fpstate->regs.xsave.header.xfeatures &= ~XFEATURE_MASK_PASID;
+
 	trace_x86_fpu_copy_src(src_fpu);
 	trace_x86_fpu_copy_dst(dst_fpu);
 
-- 
2.34.1


  parent reply	other threads:[~2021-12-17 22:02 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-17 22:01 [PATCH v2 00/11] Re-enable ENQCMD and PASID MSR Fenghua Yu
2021-12-17 22:01 ` [PATCH v2 01/11] iommu/sva: Rename CONFIG_IOMMU_SVA_LIB to CONFIG_IOMMU_SVA Fenghua Yu
2021-12-17 22:01 ` [PATCH v2 02/11] mm: Change CONFIG option for mm->pasid field Fenghua Yu
2021-12-17 22:01 ` [PATCH v2 03/11] iommu/ioasid: Introduce a helper to check for valid PASIDs Fenghua Yu
2021-12-17 22:01 ` [PATCH v2 04/11] kernel/fork: Initialize mm's PASID Fenghua Yu
2021-12-17 22:01 ` [PATCH v2 05/11] iommu/sva: Assign a PASID to mm on PASID allocation and free it on mm exit Fenghua Yu
2022-01-24 20:21   ` Thomas Gleixner
2022-01-24 20:33     ` Fenghua Yu
2022-01-24 20:36     ` Thomas Gleixner
2022-01-24 20:52       ` Fenghua Yu
2022-01-24 20:55         ` Thomas Gleixner
2022-01-25 15:18           ` Fenghua Yu
2022-01-26 14:23             ` Thomas Gleixner
2022-01-26 17:36               ` Fenghua Yu
2022-01-26 21:38                 ` Thomas Gleixner
2022-01-28  2:42                   ` Fenghua Yu
2022-01-28 14:53                     ` Thomas Gleixner
2021-12-17 22:01 ` Fenghua Yu [this message]
2021-12-17 22:01 ` [PATCH v2 07/11] sched: Define and initialize a flag to identify valid PASID in the task Fenghua Yu
2021-12-17 22:01 ` [PATCH v2 08/11] x86/traps: Demand-populate PASID MSR via #GP Fenghua Yu
2021-12-17 22:01 ` [PATCH v2 09/11] x86/cpufeatures: Re-enable ENQCMD Fenghua Yu
2021-12-17 22:01 ` [PATCH v2 10/11] tools/objtool: Check for use of the ENQCMD instruction in the kernel Fenghua Yu
2021-12-17 22:57   ` Josh Poimboeuf
2021-12-27 17:50     ` Fenghua Yu
2021-12-17 22:01 ` [PATCH v2 11/11] docs: x86: Change documentation for SVA (Shared Virtual Addressing) Fenghua Yu
2021-12-27 17:52 ` [PATCH v2 00/11] Re-enable ENQCMD and PASID MSR Fenghua Yu

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