From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E29F4C433EF for ; Tue, 25 Jan 2022 13:31:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1577355AbiAYNb1 (ORCPT ); Tue, 25 Jan 2022 08:31:27 -0500 Received: from relmlor1.renesas.com ([210.160.252.171]:54506 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1454641AbiAYN1T (ORCPT ); Tue, 25 Jan 2022 08:27:19 -0500 X-IronPort-AV: E=Sophos;i="5.88,314,1635174000"; d="scan'208";a="107606153" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 25 Jan 2022 22:25:19 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 6E0784295950; Tue, 25 Jan 2022 22:25:17 +0900 (JST) From: Lad Prabhakar To: Mark Brown , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , alsa-devel@alsa-project.org, Pavel Machek Cc: linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das , Prabhakar , Lad Prabhakar Subject: [PATCH 3/3] ASoC: sh: rz-ssi: Remove duplicate macros Date: Tue, 25 Jan 2022 13:24:57 +0000 Message-Id: <20220125132457.14984-4-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220125132457.14984-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20220125132457.14984-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove SSICR_MST and SSICR_CKDV macros which are defined more than once. Signed-off-by: Lad Prabhakar --- sound/soc/sh/rz-ssi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/soc/sh/rz-ssi.c b/sound/soc/sh/rz-ssi.c index 1a46c9f3c4e5..e8edaed05d4c 100644 --- a/sound/soc/sh/rz-ssi.c +++ b/sound/soc/sh/rz-ssi.c @@ -28,8 +28,6 @@ /* SSI REGISTER BITS */ #define SSICR_DWL(x) (((x) & 0x7) << 19) #define SSICR_SWL(x) (((x) & 0x7) << 16) -#define SSICR_MST BIT(14) -#define SSICR_CKDV(x) (((x) & 0xf) << 4) #define SSICR_CKS BIT(30) #define SSICR_TUIEN BIT(29) -- 2.17.1