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From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <bp@alien8.de>,
	<mchehab@kernel.org>, <tony.luck@intel.com>,
	<james.morse@arm.com>, <rric@kernel.org>,
	<Smita.KoralahalliChannabasappa@amd.com>,
	Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v4 02/24] EDAC/amd64: Define functions for DramOffset
Date: Thu, 27 Jan 2022 20:40:53 +0000	[thread overview]
Message-ID: <20220127204115.384161-3-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20220127204115.384161-1-yazen.ghannam@amd.com>

Add helper functions to read the DramOffset register and to remove the
offset from the calculated address.

The helper functions will be expanded in future DF versions.

Rename the "base" variable to "map_num" to indicate that this is the
address map number. An address map is defined with a base and limit
value. The map_num variable is used to select the proper base and limit
registers to use for the address translation.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lore.kernel.org/r/20211028175728.121452-7-yazen.ghannam@amd.com

v3->v4:
* Include pr_debug() on failure.
* Remove leading whitespace in function pointer.

v2->v3:
* Was patch 7 in v2.
* Dropped "df_regs" use.

v1->v2:
* Moved from arch/x86 to EDAC.
* Add function to data_fabric_ops.

 drivers/edac/amd64_edac.c | 60 ++++++++++++++++++++++++++++++---------
 1 file changed, 46 insertions(+), 14 deletions(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 639dfbea3348..837bca7eb1ff 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1057,21 +1057,62 @@ static int df_indirect_read_broadcast(u16 node, u8 func, u16 reg, u32 *lo)
 	return __df_indirect_read(node, func, reg, DF_BROADCAST, lo);
 }
 
+/* Use "reg_" prefix for raw register values. */
 struct addr_ctx {
 	u64 ret_addr;
 	u32 tmp;
+	u32 reg_dram_offset;
 	u16 nid;
 	u8 inst_id;
+	u8 map_num;
 };
 
 struct data_fabric_ops {
+	u64	(*get_hi_addr_offset)(struct addr_ctx *ctx);
 };
 
+static u64 get_hi_addr_offset_df2(struct addr_ctx *ctx)
+{
+	return (ctx->reg_dram_offset & GENMASK_ULL(31, 20)) << 8;
+}
+
 struct data_fabric_ops df2_ops = {
+	.get_hi_addr_offset		=	get_hi_addr_offset_df2,
 };
 
 struct data_fabric_ops *df_ops;
 
+static int get_dram_offset_reg(struct addr_ctx *ctx)
+{
+	/* Read D18F0x1B4 (DramOffset) */
+	if (df_indirect_read_instance(ctx->nid, 0, 0x1B4, ctx->inst_id, &ctx->reg_dram_offset))
+		return -EINVAL;
+
+	return 0;
+}
+
+static int remove_dram_offset(struct addr_ctx *ctx)
+{
+	if (get_dram_offset_reg(ctx)) {
+		pr_debug("Failed to get DRAM Offset register");
+		return -EINVAL;
+	}
+
+	ctx->map_num = 0;
+
+	/* Remove HiAddrOffset from normalized address, if enabled: */
+	if (ctx->reg_dram_offset & BIT(0)) {
+		u64 hi_addr_offset = df_ops->get_hi_addr_offset(ctx);
+
+		if (ctx->ret_addr >= hi_addr_offset) {
+			ctx->ret_addr -= hi_addr_offset;
+			ctx->map_num = 1;
+		}
+	}
+
+	return 0;
+}
+
 static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
 {
 	u64 dram_base_addr, dram_limit_addr, dram_hole_base;
@@ -1080,7 +1121,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
 	u8 intlv_num_dies, intlv_num_chan, intlv_num_sockets;
 	u8 intlv_addr_sel, intlv_addr_bit;
 	u8 num_intlv_bits, hashed_bit;
-	u8 lgcy_mmio_hole_en, base = 0;
+	u8 lgcy_mmio_hole_en;
 	u8 cs_mask, cs_id = 0;
 	bool hash_enabled = false;
 
@@ -1099,22 +1140,13 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
 	ctx.nid = nid;
 	ctx.inst_id = umc;
 
-	/* Read D18F0x1B4 (DramOffset), check if base 1 is used. */
-	if (df_indirect_read_instance(nid, 0, 0x1B4, umc, &ctx.tmp))
+	if (remove_dram_offset(&ctx)) {
+		pr_debug("Failed to remove DRAM offset");
 		goto out_err;
-
-	/* Remove HiAddrOffset from normalized address, if enabled: */
-	if (ctx.tmp & BIT(0)) {
-		u64 hi_addr_offset = (ctx.tmp & GENMASK_ULL(31, 20)) << 8;
-
-		if (norm_addr >= hi_addr_offset) {
-			ctx.ret_addr -= hi_addr_offset;
-			base = 1;
-		}
 	}
 
 	/* Read D18F0x110 (DramBaseAddress). */
-	if (df_indirect_read_instance(nid, 0, 0x110 + (8 * base), umc, &ctx.tmp))
+	if (df_indirect_read_instance(nid, 0, 0x110 + (8 * ctx.map_num), umc, &ctx.tmp))
 		goto out_err;
 
 	/* Check if address range is valid. */
@@ -1137,7 +1169,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
 	}
 
 	/* Read D18F0x114 (DramLimitAddress). */
-	if (df_indirect_read_instance(nid, 0, 0x114 + (8 * base), umc, &ctx.tmp))
+	if (df_indirect_read_instance(nid, 0, 0x114 + (8 * ctx.map_num), umc, &ctx.tmp))
 		goto out_err;
 
 	intlv_num_sockets = (ctx.tmp >> 8) & 0x1;
-- 
2.25.1


  parent reply	other threads:[~2022-01-27 20:41 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-27 20:40 [PATCH v4 00/24] AMD MCA Address Translation Updates Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 01/24] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2022-02-11 19:10   ` Borislav Petkov
2022-03-09 21:42     ` Yazen Ghannam
2022-01-27 20:40 ` Yazen Ghannam [this message]
2022-02-11 19:23   ` [PATCH v4 02/24] EDAC/amd64: Define functions for DramOffset Borislav Petkov
2022-03-09 21:43     ` Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 03/24] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 04/24] EDAC/amd64: Define function to find interleaving mode Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 05/24] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 06/24] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2022-01-27 20:40 ` [PATCH v4 07/24] EDAC/amd64: Define function to dehash address Yazen Ghannam
2022-02-11 22:47   ` Borislav Petkov
2022-03-09 21:50     ` Yazen Ghannam
2022-03-10 16:01       ` Borislav Petkov
2022-01-27 20:40 ` [PATCH v4 08/24] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2022-02-14 10:06   ` Borislav Petkov
2022-03-09 22:03     ` Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 09/24] EDAC/amd64: Remove goto statements Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 10/24] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2022-02-14 12:10   ` Borislav Petkov
2022-03-09 22:12     ` Yazen Ghannam
2022-03-10 16:09       ` Borislav Petkov
2022-01-27 20:41 ` [PATCH v4 11/24] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 12/24] EDAC/amd64: Define function to get number of interleaved channels Yazen Ghannam
2022-02-14 12:20   ` Borislav Petkov
2022-03-09 22:13     ` Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 13/24] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 14/24] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 15/24] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 16/24] EDAC/amd64: Define function to make space for CS ID Yazen Ghannam
2022-02-14 12:50   ` Borislav Petkov
2022-03-09 22:25     ` Yazen Ghannam
2022-03-11 21:00       ` Borislav Petkov
2022-01-27 20:41 ` [PATCH v4 17/24] EDAC/amd64: Define function to calculate " Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 18/24] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2022-02-14 13:09   ` Borislav Petkov
2022-03-09 22:31     ` Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 19/24] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 20/24] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 21/24] EDAC/amd64: Update CS ID calculation to match reference code Yazen Ghannam
2022-02-14 13:42   ` Borislav Petkov
2022-03-09 22:32     ` Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 22/24] EDAC/amd64: Match hash function to " Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 23/24] EDAC/amd64: Define function to get interleave address select bit Yazen Ghannam
2022-01-27 20:41 ` [PATCH v4 24/24] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam

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