From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
"Rob Herring" <robh+dt@kernel.org>,
openbmc@lists.ozlabs.org, "Tomer Maimon" <tmaimon77@gmail.com>,
"Joel Stanley" <joel@jms.id.au>,
linux-kernel@vger.kernel.org,
"Andy Shevchenko" <andy.shevchenko@gmail.com>,
"Avi Fishman" <avifishman70@gmail.com>,
"Tali Perry" <tali.perry1@gmail.com>,
"Patrick Venture" <venture@google.com>,
"Nancy Yuen" <yuenn@google.com>,
"Benjamin Fair" <benjaminfair@google.com>,
"Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
Subject: [PATCH v5 0/9] Nuvoton WPCM450 pinctrl and GPIO driver
Date: Sat, 29 Jan 2022 12:52:19 +0100 [thread overview]
Message-ID: <20220129115228.2257310-1-j.neuschaefer@gmx.net> (raw)
This is version 5 of the WPCM450 pinctrl/GPIO driver patchset.
I was originally just going to rebase the patchset on top of v5.17-rc1,
but while testing, I found that the IRQ handling code violated locking
rules, specifically that it used spin locks (which can sleep on RT kernels)
in IRQ contexts. So I made a few changes to fix that, mainly switching
to raw spin locks.
Best regards,
Jonathan Neuschäfer
v4: https://lore.kernel.org/lkml/20220109173000.1242703-1-j.neuschaefer@gmx.net/
v3: https://lore.kernel.org/lkml/20211224200935.93817-1-j.neuschaefer@gmx.net/
v2: https://lore.kernel.org/lkml/20211207210823.1975632-1-j.neuschaefer@gmx.net/
v1:
- https://lore.kernel.org/lkml/20210602120329.2444672-1-j.neuschaefer@gmx.net/
> This series adds support for pinctrl and GPIO in the Nuvoton WPCM450 SoC.
> Both my DT bindings and my driver are based on the work done by others for
> the newer Nuvoton NPCM7xx SoC, and I've tried to keep both similar.
>
> Instead of extending the pinctrl-npcm7xx driver to add WPCM450 support,
> I copied/forked it. The pinmux mechanism is very similar (using MFSEL1 and
> MFSEL2 registers), but the GPIO register interface has been redesigned for
> NPCM7xx; adding support for the older GPIO controller would make the driver
> harder to understand, while only enabling a small amount of code sharing.
>
> The DT binding in YAML format might make a good template for also converting
> the nuvoton,npcm7xx-pinctrl binding to YAML.
>
> Both in the DT binding and in the driver I kept the name "pinctrl". For the
> driver, I find it accurate enough because it handles pinctrl and GPIO. For
> the DT node, it's a bit less accurate because the register block at 0xb8003000
> is about GPIOs, and pin control happens in the global control registers (GCR)
> block, except for input debouncing. So, "GPIO" might be the more appropriate
> name component there.
Jonathan Neuschäfer (9):
dt-bindings: arm/npcm: Add binding for global control registers (GCR)
MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM
architecture
ARM: dts: wpcm450: Add global control registers (GCR) node
dt-bindings: pinctrl: Add Nuvoton WPCM450
pinctrl: nuvoton: Add driver for WPCM450
ARM: dts: wpcm450: Add pinctrl and GPIO nodes
ARM: dts: wpcm450: Add pin functions
ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons
ARM: dts: wpcm450: Add pinmux information to UART0
.../bindings/arm/npcm/nuvoton,gcr.yaml | 48 +
.../pinctrl/nuvoton,wpcm450-pinctrl.yaml | 160 +++
MAINTAINERS | 2 +
.../nuvoton-wpcm450-supermicro-x9sci-ln4f.dts | 43 +
arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 384 ++++++
drivers/pinctrl/Makefile | 2 +-
drivers/pinctrl/nuvoton/Kconfig | 18 +
drivers/pinctrl/nuvoton/Makefile | 1 +
drivers/pinctrl/nuvoton/pinctrl-wpcm450.c | 1150 +++++++++++++++++
9 files changed, 1807 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml
create mode 100644 drivers/pinctrl/nuvoton/pinctrl-wpcm450.c
--
2.34.1
next reply other threads:[~2022-01-29 11:57 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-29 11:52 Jonathan Neuschäfer [this message]
2022-01-29 11:52 ` [PATCH v5 1/9] dt-bindings: arm/npcm: Add binding for global control registers (GCR) Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 2/9] MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 3/9] ARM: dts: wpcm450: Add global control registers (GCR) node Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 4/9] dt-bindings: pinctrl: Add Nuvoton WPCM450 Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 5/9] pinctrl: nuvoton: Add driver for WPCM450 Jonathan Neuschäfer
2022-01-29 13:48 ` kernel test robot
2022-01-29 14:09 ` kernel test robot
2022-01-30 18:47 ` Andy Shevchenko
2022-01-30 20:17 ` Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 6/9] ARM: dts: wpcm450: Add pinctrl and GPIO nodes Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 7/9] ARM: dts: wpcm450: Add pin functions Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 8/9] ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 9/9] ARM: dts: wpcm450: Add pinmux information to UART0 Jonathan Neuschäfer
2022-01-30 1:50 ` [PATCH v5 0/9] Nuvoton WPCM450 pinctrl and GPIO driver Linus Walleij
2022-01-30 10:12 ` Jonathan Neuschäfer
2022-02-01 23:42 ` Joel Stanley
2022-02-02 12:01 ` Jonathan Neuschäfer
2022-02-02 12:10 ` Andy Shevchenko
2022-02-02 12:40 ` Jonathan Neuschäfer
2022-02-12 8:40 ` Jonathan Neuschäfer
2022-02-15 5:56 ` Joel Stanley
2022-02-15 17:19 ` Jonathan Neuschäfer
2022-03-15 0:17 ` Linus Walleij
2022-03-15 1:13 ` Joel Stanley
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