[PATCH V2 0/4] mailbox: imx: support i.MX93

[PATCH V2 0/4] mailbox: imx: support i.MX93

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

V2:
 Fix dt bindings in patch 1/4 2/4
 Squash author/copyright patch into patch 4/4

Based on: https://lkml.org/lkml/2022/2/6/304
Add i.MX93 Generic MU and S4 MU support
i.MX93 S4 MU has some changes compared with i.MX8ULP S4 MU, it
has two interrupts, tx/rx, so also update dt binding doc.

Peng Fan (4):
  dt-bindings: mailbox: imx-mu: add i.MX93 MU
  dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support
  mailbox: imx: extend irq to an array
  mailbox: imx: support i.MX93 S401 MU

 .../devicetree/bindings/mailbox/fsl,mu.yaml   | 24 +++++++++
 drivers/mailbox/imx-mailbox.c                 | 53 +++++++++++++++----
 2 files changed, 66 insertions(+), 11 deletions(-)

-- 
2.25.1

[PATCH V2 1/4] dt-bindings: mailbox: imx-mu: add i.MX93 MU

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add bindings for i.MX93 MU which derived from i.MX8ULP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index f865b806ae6a..6d056d5e16bf 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -30,6 +30,9 @@ properties:
       - const: fsl,imx8-mu-scu
       - const: fsl,imx8-mu-seco
       - const: fsl,imx8ulp-mu-s4
+      - items:
+          - const: fsl,imx93-mu
+          - const: fsl,imx8ulp-mu
       - items:
           - enum:
               - fsl,imx7s-mu
-- 
2.25.1

[PATCH V2 2/4] dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Similar to i.MX8ULP S4 MU, i.MX93 MU is dedicated for communication
between Sentinel and Cortex-A cores from hardware design, it could not be
reused for other purpose.

However i.MX93 S4 MU use separate tx/rx interrupt, so update
interrupts and add interrupt-names property.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../devicetree/bindings/mailbox/fsl,mu.yaml   | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index 6d056d5e16bf..f0a7e693ebf8 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -29,6 +29,7 @@ properties:
       - const: fsl,imx8ulp-mu
       - const: fsl,imx8-mu-scu
       - const: fsl,imx8-mu-seco
+      - const: fsl,imx93-mu-s4
       - const: fsl,imx8ulp-mu-s4
       - items:
           - const: fsl,imx93-mu
@@ -57,6 +58,12 @@ properties:
   interrupts:
     maxItems: 1
 
+  interrupt-names:
+    minItems: 1
+    items:
+      - const: txirq
+      - const: rxirq
+
   "#mbox-cells":
     description: |
       <&phandle type channel>
@@ -90,6 +97,20 @@ required:
   - interrupts
   - "#mbox-cells"
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          enum:
+            - fsl,imx93-mu-s4
+    then:
+      properties:
+        interrupt-names:
+          minItems: 2
+          maxItems: 2
+        interrupts:
+          maxItems: 2
+
 additionalProperties: false
 
 examples:
-- 
2.25.1

[PATCH V2 3/4] mailbox: imx: extend irq to an array

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

To i.MX93 S401 MU, there are two interrupts: rx full and tx empty.
So extend irq to an array to prepare i.MX93 S401 MU support.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/mailbox/imx-mailbox.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index cd011ca5707e..03699843a6fd 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -80,7 +80,7 @@ struct imx_mu_priv {
 	struct imx_mu_con_priv  con_priv[IMX_MU_CHANS];
 	const struct imx_mu_dcfg	*dcfg;
 	struct clk		*clk;
-	int			irq;
+	int			irq[IMX_MU_CHANS];
 	bool			suspend;
 
 	u32 xcr[4];
@@ -551,11 +551,11 @@ static int imx_mu_startup(struct mbox_chan *chan)
 	if (!priv->dev->pm_domain)
 		irq_flag |= IRQF_NO_SUSPEND;
 
-	ret = request_irq(priv->irq, imx_mu_isr, irq_flag,
+	ret = request_irq(priv->irq[0], imx_mu_isr, irq_flag,
 			  cp->irq_desc, chan);
 	if (ret) {
 		dev_err(priv->dev,
-			"Unable to acquire IRQ %d\n", priv->irq);
+			"Unable to acquire IRQ %d\n", priv->irq[0]);
 		return ret;
 	}
 
@@ -598,7 +598,7 @@ static void imx_mu_shutdown(struct mbox_chan *chan)
 		break;
 	}
 
-	free_irq(priv->irq, chan);
+	free_irq(priv->irq[0], chan);
 	pm_runtime_put_sync(priv->dev);
 }
 
@@ -762,9 +762,9 @@ static int imx_mu_probe(struct platform_device *pdev)
 	if (IS_ERR(priv->base))
 		return PTR_ERR(priv->base);
 
-	priv->irq = platform_get_irq(pdev, 0);
-	if (priv->irq < 0)
-		return priv->irq;
+	priv->irq[0] = platform_get_irq(pdev, 0);
+	if (priv->irq[0] < 0)
+		return priv->irq[0];
 
 	dcfg = of_device_get_match_data(dev);
 	if (!dcfg)
-- 
2.25.1

[PATCH V2 4/4] mailbox: imx: support i.MX93 S401 MU

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX93 S401 MU support two interrupts: tx empty and rx full.

 - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case
 - Add i.MX93 S401 MU cfg
 - Update author and Copyright

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/mailbox/imx-mailbox.c | 49 ++++++++++++++++++++++++++++-------
 1 file changed, 40 insertions(+), 9 deletions(-)

diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index 03699843a6fd..094dc84291fc 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2018 Pengutronix, Oleksij Rempel <o.rempel@pengutronix.de>
+ * Copyright 2022 NXP, Peng Fan <peng.fan@nxp.com>
  */
 
 #include <linux/clk.h>
@@ -28,6 +29,7 @@
 #define IMX_MU_SECO_TX_TOUT (msecs_to_jiffies(3000))
 #define IMX_MU_SECO_RX_TOUT (msecs_to_jiffies(3000))
 
+/* Please not change TX & RX */
 enum imx_mu_chan_type {
 	IMX_MU_TYPE_TX,		/* Tx */
 	IMX_MU_TYPE_RX,		/* Rx */
@@ -92,6 +94,7 @@ enum imx_mu_type {
 	IMX_MU_V1,
 	IMX_MU_V2 = BIT(1),
 	IMX_MU_V2_S4 = BIT(15),
+	IMX_MU_V2_IRQ = BIT(16),
 };
 
 struct imx_mu_dcfg {
@@ -536,7 +539,8 @@ static int imx_mu_startup(struct mbox_chan *chan)
 {
 	struct imx_mu_priv *priv = to_imx_mu_priv(chan->mbox);
 	struct imx_mu_con_priv *cp = chan->con_priv;
-	unsigned long irq_flag = IRQF_SHARED;
+	unsigned long irq_flag = 0;
+	int irq;
 	int ret;
 
 	pm_runtime_get_sync(priv->dev);
@@ -551,11 +555,16 @@ static int imx_mu_startup(struct mbox_chan *chan)
 	if (!priv->dev->pm_domain)
 		irq_flag |= IRQF_NO_SUSPEND;
 
-	ret = request_irq(priv->irq[0], imx_mu_isr, irq_flag,
-			  cp->irq_desc, chan);
+	if (priv->dcfg->type & IMX_MU_V2_IRQ) {
+		irq = priv->irq[cp->type];
+	} else {
+		irq = priv->irq[0];
+		irq_flag |= IRQF_SHARED;
+	}
+
+	ret = request_irq(irq, imx_mu_isr, irq_flag, cp->irq_desc, chan);
 	if (ret) {
-		dev_err(priv->dev,
-			"Unable to acquire IRQ %d\n", priv->irq[0]);
+		dev_err(priv->dev, "Unable to acquire IRQ %d\n", irq);
 		return ret;
 	}
 
@@ -762,14 +771,23 @@ static int imx_mu_probe(struct platform_device *pdev)
 	if (IS_ERR(priv->base))
 		return PTR_ERR(priv->base);
 
-	priv->irq[0] = platform_get_irq(pdev, 0);
-	if (priv->irq[0] < 0)
-		return priv->irq[0];
-
 	dcfg = of_device_get_match_data(dev);
 	if (!dcfg)
 		return -EINVAL;
 	priv->dcfg = dcfg;
+	if (priv->dcfg->type & IMX_MU_V2_IRQ) {
+		priv->irq[IMX_MU_TYPE_TX] = platform_get_irq_byname(pdev, "txirq");
+		if (priv->irq[IMX_MU_TYPE_TX] < 0)
+			return priv->irq[IMX_MU_TYPE_TX];
+		priv->irq[IMX_MU_TYPE_RX] = platform_get_irq_byname(pdev, "rxirq");
+		if (priv->irq[IMX_MU_TYPE_RX] < 0)
+			return priv->irq[IMX_MU_TYPE_RX];
+	} else {
+		priv->irq[0] = platform_get_irq(pdev, 0);
+		if (priv->irq[0] < 0)
+			return priv->irq[0];
+
+	}
 
 	if (priv->dcfg->type & IMX_MU_V2_S4)
 		size = sizeof(struct imx_s4_rpc_msg_max);
@@ -890,6 +908,17 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp_s4 = {
 	.xCR	= {0x110, 0x114, 0x120, 0x128},
 };
 
+static const struct imx_mu_dcfg imx_mu_cfg_imx93_s4 = {
+	.tx	= imx_mu_specific_tx,
+	.rx	= imx_mu_specific_rx,
+	.init	= imx_mu_init_specific,
+	.type	= IMX_MU_V2 | IMX_MU_V2_S4 | IMX_MU_V2_IRQ,
+	.xTR	= 0x200,
+	.xRR	= 0x280,
+	.xSR	= {0xC, 0x118, 0x124, 0x12C},
+	.xCR	= {0x110, 0x114, 0x120, 0x128},
+};
+
 static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = {
 	.tx	= imx_mu_specific_tx,
 	.rx	= imx_mu_specific_rx,
@@ -917,6 +946,7 @@ static const struct of_device_id imx_mu_dt_ids[] = {
 	{ .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx },
 	{ .compatible = "fsl,imx8ulp-mu", .data = &imx_mu_cfg_imx8ulp },
 	{ .compatible = "fsl,imx8ulp-mu-s4", .data = &imx_mu_cfg_imx8ulp_s4 },
+	{ .compatible = "fsl,imx93-mu-s4", .data = &imx_mu_cfg_imx93_s4 },
 	{ .compatible = "fsl,imx8-mu-scu", .data = &imx_mu_cfg_imx8_scu },
 	{ .compatible = "fsl,imx8-mu-seco", .data = &imx_mu_cfg_imx8_seco },
 	{ },
@@ -1001,5 +1031,6 @@ static struct platform_driver imx_mu_driver = {
 module_platform_driver(imx_mu_driver);
 
 MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>");
+MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
 MODULE_DESCRIPTION("Message Unit driver for i.MX");
 MODULE_LICENSE("GPL v2");
-- 
2.25.1

Re: [PATCH V2 2/4] dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support

[Krzysztof Kozlowski]

On 08/02/2022 07:30, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Similar to i.MX8ULP S4 MU, i.MX93 MU is dedicated for communication
> between Sentinel and Cortex-A cores from hardware design, it could not be
> reused for other purpose.
> 
> However i.MX93 S4 MU use separate tx/rx interrupt, so update
> interrupts and add interrupt-names property.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../devicetree/bindings/mailbox/fsl,mu.yaml   | 21 +++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>


Best regards,
Krzysztof

Re: [PATCH V2 1/4] dt-bindings: mailbox: imx-mu: add i.MX93 MU

[Krzysztof Kozlowski]

On 08/02/2022 07:30, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add bindings for i.MX93 MU which derived from i.MX8ULP
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 3 +++
>  1 file changed, 3 insertions(+)
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>


Best regards,
Krzysztof

Re: [PATCH V2 4/4] mailbox: imx: support i.MX93 S401 MU

[Daniel Baluta]

Peng,

This patch is doing 3 things in one patch.

Please split this with one patch per functional change.

On Wed, Feb 9, 2022 at 1:20 PM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> i.MX93 S401 MU support two interrupts: tx empty and rx full.
>
>  - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case
>  - Add i.MX93 S401 MU cfg
>  - Update author and Copyright
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/mailbox/imx-mailbox.c | 49 ++++++++++++++++++++++++++++-------
>  1 file changed, 40 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
> index 03699843a6fd..094dc84291fc 100644
> --- a/drivers/mailbox/imx-mailbox.c
> +++ b/drivers/mailbox/imx-mailbox.c
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0
>  /*
>   * Copyright (c) 2018 Pengutronix, Oleksij Rempel <o.rempel@pengutronix.de>
> + * Copyright 2022 NXP, Peng Fan <peng.fan@nxp.com>
>   */
>
>  #include <linux/clk.h>
> @@ -28,6 +29,7 @@
>  #define IMX_MU_SECO_TX_TOUT (msecs_to_jiffies(3000))
>  #define IMX_MU_SECO_RX_TOUT (msecs_to_jiffies(3000))
>
> +/* Please not change TX & RX */
>  enum imx_mu_chan_type {
>         IMX_MU_TYPE_TX,         /* Tx */
>         IMX_MU_TYPE_RX,         /* Rx */
> @@ -92,6 +94,7 @@ enum imx_mu_type {
>         IMX_MU_V1,
>         IMX_MU_V2 = BIT(1),
>         IMX_MU_V2_S4 = BIT(15),
> +       IMX_MU_V2_IRQ = BIT(16),
>  };
>
>  struct imx_mu_dcfg {
> @@ -536,7 +539,8 @@ static int imx_mu_startup(struct mbox_chan *chan)
>  {
>         struct imx_mu_priv *priv = to_imx_mu_priv(chan->mbox);
>         struct imx_mu_con_priv *cp = chan->con_priv;
> -       unsigned long irq_flag = IRQF_SHARED;
> +       unsigned long irq_flag = 0;
> +       int irq;
>         int ret;
>
>         pm_runtime_get_sync(priv->dev);
> @@ -551,11 +555,16 @@ static int imx_mu_startup(struct mbox_chan *chan)
>         if (!priv->dev->pm_domain)
>                 irq_flag |= IRQF_NO_SUSPEND;
>
> -       ret = request_irq(priv->irq[0], imx_mu_isr, irq_flag,
> -                         cp->irq_desc, chan);
> +       if (priv->dcfg->type & IMX_MU_V2_IRQ) {
> +               irq = priv->irq[cp->type];
> +       } else {
> +               irq = priv->irq[0];
> +               irq_flag |= IRQF_SHARED;
> +       }
> +
> +       ret = request_irq(irq, imx_mu_isr, irq_flag, cp->irq_desc, chan);
>         if (ret) {
> -               dev_err(priv->dev,
> -                       "Unable to acquire IRQ %d\n", priv->irq[0]);
> +               dev_err(priv->dev, "Unable to acquire IRQ %d\n", irq);
>                 return ret;
>         }
>
> @@ -762,14 +771,23 @@ static int imx_mu_probe(struct platform_device *pdev)
>         if (IS_ERR(priv->base))
>                 return PTR_ERR(priv->base);
>
> -       priv->irq[0] = platform_get_irq(pdev, 0);
> -       if (priv->irq[0] < 0)
> -               return priv->irq[0];
> -
>         dcfg = of_device_get_match_data(dev);
>         if (!dcfg)
>                 return -EINVAL;
>         priv->dcfg = dcfg;
> +       if (priv->dcfg->type & IMX_MU_V2_IRQ) {
> +               priv->irq[IMX_MU_TYPE_TX] = platform_get_irq_byname(pdev, "txirq");
> +               if (priv->irq[IMX_MU_TYPE_TX] < 0)
> +                       return priv->irq[IMX_MU_TYPE_TX];
> +               priv->irq[IMX_MU_TYPE_RX] = platform_get_irq_byname(pdev, "rxirq");
> +               if (priv->irq[IMX_MU_TYPE_RX] < 0)
> +                       return priv->irq[IMX_MU_TYPE_RX];
> +       } else {
> +               priv->irq[0] = platform_get_irq(pdev, 0);
> +               if (priv->irq[0] < 0)
> +                       return priv->irq[0];
> +
> +       }
>
>         if (priv->dcfg->type & IMX_MU_V2_S4)
>                 size = sizeof(struct imx_s4_rpc_msg_max);
> @@ -890,6 +908,17 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp_s4 = {
>         .xCR    = {0x110, 0x114, 0x120, 0x128},
>  };
>
> +static const struct imx_mu_dcfg imx_mu_cfg_imx93_s4 = {
> +       .tx     = imx_mu_specific_tx,
> +       .rx     = imx_mu_specific_rx,
> +       .init   = imx_mu_init_specific,
> +       .type   = IMX_MU_V2 | IMX_MU_V2_S4 | IMX_MU_V2_IRQ,
> +       .xTR    = 0x200,
> +       .xRR    = 0x280,
> +       .xSR    = {0xC, 0x118, 0x124, 0x12C},
> +       .xCR    = {0x110, 0x114, 0x120, 0x128},
> +};
> +
>  static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = {
>         .tx     = imx_mu_specific_tx,
>         .rx     = imx_mu_specific_rx,
> @@ -917,6 +946,7 @@ static const struct of_device_id imx_mu_dt_ids[] = {
>         { .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx },
>         { .compatible = "fsl,imx8ulp-mu", .data = &imx_mu_cfg_imx8ulp },
>         { .compatible = "fsl,imx8ulp-mu-s4", .data = &imx_mu_cfg_imx8ulp_s4 },
> +       { .compatible = "fsl,imx93-mu-s4", .data = &imx_mu_cfg_imx93_s4 },
>         { .compatible = "fsl,imx8-mu-scu", .data = &imx_mu_cfg_imx8_scu },
>         { .compatible = "fsl,imx8-mu-seco", .data = &imx_mu_cfg_imx8_seco },
>         { },
> @@ -1001,5 +1031,6 @@ static struct platform_driver imx_mu_driver = {
>  module_platform_driver(imx_mu_driver);
>
>  MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>");
> +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
>  MODULE_DESCRIPTION("Message Unit driver for i.MX");
>  MODULE_LICENSE("GPL v2");
> --
> 2.25.1
>

Re: [PATCH V2 4/4] mailbox: imx: support i.MX93 S401 MU

[Krzysztof Kozlowski]

On 09/02/2022 13:46, Daniel Baluta wrote:
> Peng,
> 
> This patch is doing 3 things in one patch.
> 
> Please split this with one patch per functional change.

The third task - updating author - I just asked to squash with previous
patch because it really does not have sense on its own. Authorship and
copyright update are direct effect of new code. Therefore they are
usually squashed with the actual change.

> 
> On Wed, Feb 9, 2022 at 1:20 PM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>>
>> From: Peng Fan <peng.fan@nxp.com>
>>
>> i.MX93 S401 MU support two interrupts: tx empty and rx full.
>>
>>  - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case
>>  - Add i.MX93 S401 MU cfg
>>  - Update author and Copyright

Best regards,
Krzysztof

RE: [PATCH V2 4/4] mailbox: imx: support i.MX93 S401 MU

[Peng Fan]

Daniel

> Subject: Re: [PATCH V2 4/4] mailbox: imx: support i.MX93 S401 MU
> 
> Peng,
> 
> This patch is doing 3 things in one patch.

I could split the new flag and i.mx93 support

Thanks,
Peng.

> 
> Please split this with one patch per functional change.
> 
> On Wed, Feb 9, 2022 at 1:20 PM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> >
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > i.MX93 S401 MU support two interrupts: tx empty and rx full.
> >
> >  - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case
> >  - Add i.MX93 S401 MU cfg
> >  - Update author and Copyright
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  drivers/mailbox/imx-mailbox.c | 49
> > ++++++++++++++++++++++++++++-------
> >  1 file changed, 40 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/mailbox/imx-mailbox.c
> > b/drivers/mailbox/imx-mailbox.c index 03699843a6fd..094dc84291fc
> > 100644
> > --- a/drivers/mailbox/imx-mailbox.c
> > +++ b/drivers/mailbox/imx-mailbox.c
> > @@ -1,6 +1,7 @@
> >  // SPDX-License-Identifier: GPL-2.0
> >  /*
> >   * Copyright (c) 2018 Pengutronix, Oleksij Rempel
> > <o.rempel@pengutronix.de>
> > + * Copyright 2022 NXP, Peng Fan <peng.fan@nxp.com>
> >   */
> >
> >  #include <linux/clk.h>
> > @@ -28,6 +29,7 @@
> >  #define IMX_MU_SECO_TX_TOUT (msecs_to_jiffies(3000))  #define
> > IMX_MU_SECO_RX_TOUT (msecs_to_jiffies(3000))
> >
> > +/* Please not change TX & RX */
> >  enum imx_mu_chan_type {
> >         IMX_MU_TYPE_TX,         /* Tx */
> >         IMX_MU_TYPE_RX,         /* Rx */
> > @@ -92,6 +94,7 @@ enum imx_mu_type {
> >         IMX_MU_V1,
> >         IMX_MU_V2 = BIT(1),
> >         IMX_MU_V2_S4 = BIT(15),
> > +       IMX_MU_V2_IRQ = BIT(16),
> >  };
> >
> >  struct imx_mu_dcfg {
> > @@ -536,7 +539,8 @@ static int imx_mu_startup(struct mbox_chan *chan)
> > {
> >         struct imx_mu_priv *priv = to_imx_mu_priv(chan->mbox);
> >         struct imx_mu_con_priv *cp = chan->con_priv;
> > -       unsigned long irq_flag = IRQF_SHARED;
> > +       unsigned long irq_flag = 0;
> > +       int irq;
> >         int ret;
> >
> >         pm_runtime_get_sync(priv->dev); @@ -551,11 +555,16 @@
> static
> > int imx_mu_startup(struct mbox_chan *chan)
> >         if (!priv->dev->pm_domain)
> >                 irq_flag |= IRQF_NO_SUSPEND;
> >
> > -       ret = request_irq(priv->irq[0], imx_mu_isr, irq_flag,
> > -                         cp->irq_desc, chan);
> > +       if (priv->dcfg->type & IMX_MU_V2_IRQ) {
> > +               irq = priv->irq[cp->type];
> > +       } else {
> > +               irq = priv->irq[0];
> > +               irq_flag |= IRQF_SHARED;
> > +       }
> > +
> > +       ret = request_irq(irq, imx_mu_isr, irq_flag, cp->irq_desc,
> > + chan);
> >         if (ret) {
> > -               dev_err(priv->dev,
> > -                       "Unable to acquire IRQ %d\n", priv->irq[0]);
> > +               dev_err(priv->dev, "Unable to acquire IRQ %d\n", irq);
> >                 return ret;
> >         }
> >
> > @@ -762,14 +771,23 @@ static int imx_mu_probe(struct platform_device
> *pdev)
> >         if (IS_ERR(priv->base))
> >                 return PTR_ERR(priv->base);
> >
> > -       priv->irq[0] = platform_get_irq(pdev, 0);
> > -       if (priv->irq[0] < 0)
> > -               return priv->irq[0];
> > -
> >         dcfg = of_device_get_match_data(dev);
> >         if (!dcfg)
> >                 return -EINVAL;
> >         priv->dcfg = dcfg;
> > +       if (priv->dcfg->type & IMX_MU_V2_IRQ) {
> > +               priv->irq[IMX_MU_TYPE_TX] =
> platform_get_irq_byname(pdev, "txirq");
> > +               if (priv->irq[IMX_MU_TYPE_TX] < 0)
> > +                       return priv->irq[IMX_MU_TYPE_TX];
> > +               priv->irq[IMX_MU_TYPE_RX] =
> platform_get_irq_byname(pdev, "rxirq");
> > +               if (priv->irq[IMX_MU_TYPE_RX] < 0)
> > +                       return priv->irq[IMX_MU_TYPE_RX];
> > +       } else {
> > +               priv->irq[0] = platform_get_irq(pdev, 0);
> > +               if (priv->irq[0] < 0)
> > +                       return priv->irq[0];
> > +
> > +       }
> >
> >         if (priv->dcfg->type & IMX_MU_V2_S4)
> >                 size = sizeof(struct imx_s4_rpc_msg_max); @@ -890,6
> > +908,17 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp_s4 = {
> >         .xCR    = {0x110, 0x114, 0x120, 0x128},
> >  };
> >
> > +static const struct imx_mu_dcfg imx_mu_cfg_imx93_s4 = {
> > +       .tx     = imx_mu_specific_tx,
> > +       .rx     = imx_mu_specific_rx,
> > +       .init   = imx_mu_init_specific,
> > +       .type   = IMX_MU_V2 | IMX_MU_V2_S4 | IMX_MU_V2_IRQ,
> > +       .xTR    = 0x200,
> > +       .xRR    = 0x280,
> > +       .xSR    = {0xC, 0x118, 0x124, 0x12C},
> > +       .xCR    = {0x110, 0x114, 0x120, 0x128},
> > +};
> > +
> >  static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = {
> >         .tx     = imx_mu_specific_tx,
> >         .rx     = imx_mu_specific_rx,
> > @@ -917,6 +946,7 @@ static const struct of_device_id imx_mu_dt_ids[] = {
> >         { .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx },
> >         { .compatible = "fsl,imx8ulp-mu", .data =
> &imx_mu_cfg_imx8ulp },
> >         { .compatible = "fsl,imx8ulp-mu-s4", .data =
> > &imx_mu_cfg_imx8ulp_s4 },
> > +       { .compatible = "fsl,imx93-mu-s4", .data =
> > + &imx_mu_cfg_imx93_s4 },
> >         { .compatible = "fsl,imx8-mu-scu", .data =
> &imx_mu_cfg_imx8_scu },
> >         { .compatible = "fsl,imx8-mu-seco", .data =
> &imx_mu_cfg_imx8_seco },
> >         { },
> > @@ -1001,5 +1031,6 @@ static struct platform_driver imx_mu_driver = {
> > module_platform_driver(imx_mu_driver);
> >
> >  MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>");
> > +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> >  MODULE_DESCRIPTION("Message Unit driver for i.MX");
> > MODULE_LICENSE("GPL v2");
> > --
> > 2.25.1
> >