From: Marc Zyngier <maz@kernel.org>
To: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org
Cc: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Matthias Brugger <matthias.bgg@gmail.com>,
Grygorii Strashko <grygorii.strashko@ti.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Kevin Hilman <khilman@kernel.org>,
Tony Lindgren <tony@atomide.com>,
Thomas Gleixner <tglx@linutronix.de>,
Vladimir Zapolskiy <vz@mleia.com>, Andrew Lunn <andrew@lunn.ch>,
Gregory Clement <gregory.clement@bootlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Emil Renner Berthing <kernel@esmil.dk>,
kernel-team@android.com
Subject: [PATCH 03/10] irqchip/gic: Switch to dynamic chip name output
Date: Wed, 9 Feb 2022 16:26:00 +0000 [thread overview]
Message-ID: <20220209162607.1118325-4-maz@kernel.org> (raw)
In-Reply-To: <20220209162607.1118325-1-maz@kernel.org>
The last dynamic aspect of the GIC's irq_chip structure is the
name that is associated to it.
Move the output of that name to the relevant callback, which
allows us to do a bit of cleanup and mark the structures const.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
drivers/irqchip/irq-gic.c | 102 ++++++++++++++++++++------------------
1 file changed, 54 insertions(+), 48 deletions(-)
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index fb741b42ca2d..58ba835bee1f 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -34,6 +34,7 @@
#include <linux/irqdomain.h>
#include <linux/interrupt.h>
#include <linux/percpu.h>
+#include <linux/seq_file.h>
#include <linux/slab.h>
#include <linux/irqchip.h>
#include <linux/irqchip/chained_irq.h>
@@ -66,7 +67,6 @@ union gic_base {
};
struct gic_chip_data {
- struct irq_chip chip;
union gic_base dist_base;
union gic_base cpu_base;
void __iomem *raw_dist_base;
@@ -397,18 +397,15 @@ static void gic_handle_cascade_irq(struct irq_desc *desc)
chained_irq_exit(chip, desc);
}
-static const struct irq_chip gic_chip = {
- .irq_mask = gic_mask_irq,
- .irq_unmask = gic_unmask_irq,
- .irq_eoi = gic_eoi_irq,
- .irq_set_type = gic_set_type,
- .irq_retrigger = gic_retrigger,
- .irq_get_irqchip_state = gic_irq_get_irqchip_state,
- .irq_set_irqchip_state = gic_irq_set_irqchip_state,
- .flags = IRQCHIP_SET_TYPE_MASKED |
- IRQCHIP_SKIP_SET_WAKE |
- IRQCHIP_MASK_ON_SUSPEND,
-};
+static void gic_irq_print_chip(struct irq_data *d, struct seq_file *p)
+{
+ struct gic_chip_data *gic = irq_data_get_irq_chip_data(d);
+
+ if (gic->domain->dev)
+ seq_printf(p, gic->domain->dev->of_node->name);
+ else
+ seq_printf(p, "GIC-%d", (int)(gic - &gic_data[0]));
+}
void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
{
@@ -799,8 +796,12 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
bool force)
{
void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + gic_irq(d);
+ struct gic_chip_data *gic = irq_data_get_irq_chip_data(d);
unsigned int cpu;
+ if (unlikely(gic != &gic_data[0]))
+ return -EINVAL;
+
if (!force)
cpu = cpumask_any_and(mask_val, cpu_online_mask);
else
@@ -880,6 +881,39 @@ static __init void gic_smp_init(void)
#define gic_ipi_send_mask NULL
#endif
+static const struct irq_chip gic_chip = {
+ .irq_mask = gic_mask_irq,
+ .irq_unmask = gic_unmask_irq,
+ .irq_eoi = gic_eoi_irq,
+ .irq_set_type = gic_set_type,
+ .irq_retrigger = gic_retrigger,
+ .irq_set_affinity = gic_set_affinity,
+ .ipi_send_mask = gic_ipi_send_mask,
+ .irq_get_irqchip_state = gic_irq_get_irqchip_state,
+ .irq_set_irqchip_state = gic_irq_set_irqchip_state,
+ .irq_print_chip = gic_irq_print_chip,
+ .flags = IRQCHIP_SET_TYPE_MASKED |
+ IRQCHIP_SKIP_SET_WAKE |
+ IRQCHIP_MASK_ON_SUSPEND,
+};
+
+static const struct irq_chip gic_chip_mode1 = {
+ .name = "GICv2",
+ .irq_mask = gic_eoimode1_mask_irq,
+ .irq_unmask = gic_unmask_irq,
+ .irq_eoi = gic_eoimode1_eoi_irq,
+ .irq_set_type = gic_set_type,
+ .irq_retrigger = gic_retrigger,
+ .irq_set_affinity = gic_set_affinity,
+ .ipi_send_mask = gic_ipi_send_mask,
+ .irq_get_irqchip_state = gic_irq_get_irqchip_state,
+ .irq_set_irqchip_state = gic_irq_set_irqchip_state,
+ .irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity,
+ .flags = IRQCHIP_SET_TYPE_MASKED |
+ IRQCHIP_SKIP_SET_WAKE |
+ IRQCHIP_MASK_ON_SUSPEND,
+};
+
#ifdef CONFIG_BL_SWITCHER
/*
* gic_send_sgi - send a SGI directly to given CPU interface number
@@ -1024,15 +1058,19 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
{
struct gic_chip_data *gic = d->host_data;
struct irq_data *irqd = irq_desc_get_irq_data(irq_to_desc(irq));
+ const struct irq_chip *chip;
+
+ chip = (static_branch_likely(&supports_deactivate_key) &&
+ gic == &gic_data[0]) ? &gic_chip_mode1 : &gic_chip;
switch (hw) {
case 0 ... 31:
irq_set_percpu_devid(irq);
- irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,
+ irq_domain_set_info(d, irq, hw, chip, d->host_data,
handle_percpu_devid_irq, NULL, NULL);
break;
default:
- irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,
+ irq_domain_set_info(d, irq, hw, chip, d->host_data,
handle_fasteoi_irq, NULL, NULL);
irq_set_probe(irq);
irqd_set_single_target(irqd);
@@ -1127,25 +1165,6 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
.unmap = gic_irq_domain_unmap,
};
-static void gic_init_chip(struct gic_chip_data *gic, const char *name,
- bool use_eoimode1)
-{
- /* Initialize irq_chip */
- gic->chip = gic_chip;
- gic->chip.name = name;
-
- if (use_eoimode1) {
- gic->chip.irq_mask = gic_eoimode1_mask_irq;
- gic->chip.irq_eoi = gic_eoimode1_eoi_irq;
- gic->chip.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity;
- }
-
- if (gic == &gic_data[0]) {
- gic->chip.irq_set_affinity = gic_set_affinity;
- gic->chip.ipi_send_mask = gic_ipi_send_mask;
- }
-}
-
static int gic_init_bases(struct gic_chip_data *gic,
struct fwnode_handle *handle)
{
@@ -1245,7 +1264,6 @@ static int gic_init_bases(struct gic_chip_data *gic,
static int __init __gic_init_bases(struct gic_chip_data *gic,
struct fwnode_handle *handle)
{
- char *name;
int i, ret;
if (WARN_ON(!gic || gic->domain))
@@ -1265,18 +1283,8 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
pr_info("GIC: Using split EOI/Deactivate mode\n");
}
- if (static_branch_likely(&supports_deactivate_key) && gic == &gic_data[0]) {
- name = kasprintf(GFP_KERNEL, "GICv2");
- gic_init_chip(gic, name, true);
- } else {
- name = kasprintf(GFP_KERNEL, "GIC-%d", (int)(gic-&gic_data[0]));
- gic_init_chip(gic, name, false);
- }
-
ret = gic_init_bases(gic, handle);
- if (ret)
- kfree(name);
- else if (gic == &gic_data[0])
+ if (gic == &gic_data[0])
gic_smp_init();
return ret;
@@ -1459,8 +1467,6 @@ int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq)
if (!*gic)
return -ENOMEM;
- gic_init_chip(*gic, dev->of_node->name, false);
-
ret = gic_of_setup(*gic, dev->of_node);
if (ret)
return ret;
--
2.30.2
next prev parent reply other threads:[~2022-02-09 16:27 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-09 16:25 [PATCH 00/10] irqchip: Prevent drivers abusing irq_chip::name Marc Zyngier
2022-02-09 16:25 ` [PATCH 01/10] irqdomain: Let irq_domain_set_{info,hwirq_and_chip} take a const irq_chip Marc Zyngier
2022-02-15 12:20 ` [irqchip: irq/irqchip-next] " irqchip-bot for Marc Zyngier
2022-02-09 16:25 ` [PATCH 02/10] genirq: Allow irq_chip registration functions to " Marc Zyngier
2022-02-15 12:20 ` [irqchip: irq/irqchip-next] " irqchip-bot for Marc Zyngier
2022-02-09 16:26 ` Marc Zyngier [this message]
2022-02-10 23:38 ` [PATCH 03/10] irqchip/gic: Switch to dynamic chip name output Linus Walleij
2022-02-11 9:08 ` Marc Zyngier
2022-02-15 12:19 ` [irqchip: irq/irqchip-next] " irqchip-bot for Marc Zyngier
2022-02-09 16:26 ` [PATCH 04/10] irqchip/lpc32xx: " Marc Zyngier
2022-02-15 12:19 ` [irqchip: irq/irqchip-next] " irqchip-bot for Marc Zyngier
2022-02-09 16:26 ` [PATCH 05/10] irqchip/mvebu-pic: " Marc Zyngier
2022-02-14 14:48 ` Gregory CLEMENT
2022-02-15 12:19 ` [irqchip: irq/irqchip-next] " irqchip-bot for Marc Zyngier
2022-02-09 16:26 ` [PATCH 06/10] irqchip/ts4800: " Marc Zyngier
2022-02-15 12:19 ` [irqchip: irq/irqchip-next] " irqchip-bot for Marc Zyngier
2022-02-09 16:26 ` [PATCH 07/10] irqchip/versatile-fpga: " Marc Zyngier
2022-02-10 23:29 ` Linus Walleij
2022-02-15 12:19 ` [irqchip: irq/irqchip-next] " irqchip-bot for Marc Zyngier
2022-02-09 16:26 ` [PATCH 08/10] gpio: mt7621: " Marc Zyngier
2022-02-09 16:26 ` [PATCH 09/10] gpio: omap: " Marc Zyngier
2022-02-09 16:26 ` [PATCH 10/10] pinctrl: starfive: " Marc Zyngier
2022-02-09 23:30 ` Emil Renner Berthing
2022-02-10 9:06 ` Marc Zyngier
2022-02-10 12:59 ` Emil Renner Berthing
2022-02-10 13:32 ` Marc Zyngier
2022-02-10 13:44 ` Emil Renner Berthing
2022-02-10 13:50 ` Marc Zyngier
2022-02-10 14:14 ` Emil Renner Berthing
2022-02-10 14:22 ` Marc Zyngier, Linus Walleij
2022-02-10 14:34 ` Marc Zyngier
2022-02-10 14:46 ` Emil Renner Berthing
2022-02-11 0:18 ` Linus Walleij
2022-02-11 0:15 ` Linus Walleij
2022-02-11 9:20 ` Marc Zyngier
2022-02-10 23:41 ` [PATCH 00/10] irqchip: Prevent drivers abusing irq_chip::name Linus Walleij
2022-02-15 12:13 ` Marc Zyngier
2022-02-15 15:37 ` Andy Shevchenko
2022-02-19 1:03 ` Linus Walleij
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