From: Dan Carpenter <dan.carpenter@oracle.com>
To: kbuild@lists.01.org, "Maciej W. Rozycki" <macro@orcam.me.uk>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>
Cc: lkp@intel.com, kbuild-all@lists.01.org,
Andy Shevchenko <andy.shevchenko@gmail.com>,
Mike Skoog <mskoog@endruntechnologies.com>,
Mike Korreng <mkorreng@endruntechnologies.com>,
info@endruntechnologies.com, linux-serial@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/2] serial: 8250: Add proper clock handling for OxSemi PCIe devices
Date: Thu, 17 Feb 2022 12:23:35 +0300 [thread overview]
Message-ID: <202202130027.ZKBCgtm5-lkp@intel.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2202111127200.34636@angie.orcam.me.uk>
Hi "Maciej,
url: https://github.com/0day-ci/linux/commits/Maciej-W-Rozycki/serial-8250-Fixes-for-Oxford-Semiconductor-950-UARTs/20220212-164255
base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tty-testing
config: x86_64-randconfig-m001 (https://download.01.org/0day-ci/archive/20220213/202202130027.ZKBCgtm5-lkp@intel.com/config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
New smatch warnings:
drivers/tty/serial/8250/8250_pci.c:1171 pci_oxsemi_tornado_get_divisor() error: uninitialized symbol 'tcr'.
drivers/tty/serial/8250/8250_pci.c:1172 pci_oxsemi_tornado_get_divisor() error: uninitialized symbol 'quot'.
drivers/tty/serial/8250/8250_pci.c:1180 pci_oxsemi_tornado_get_divisor() error: uninitialized symbol 'cpr'.
vim +/tcr +1171 drivers/tty/serial/8250/8250_pci.c
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1122 /* Scale the quotient for comparison to get the fractional part. */
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1123 const unsigned int quot_scale = 65536;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1124 unsigned int sclk = port->uartclk * 2;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1125 unsigned int sdiv = (sclk + (baud / 2)) / baud;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1126 unsigned int best_squot;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1127 unsigned int squot;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1128 unsigned int quot;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1129 u16 cpr;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1130 u8 tcr;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1131 int i;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1132
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1133 /* Old custom speed handling. */
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1134 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1135 unsigned int cust_div = port->custom_divisor;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1136
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1137 quot = cust_div & UART_DIV_MAX;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1138 tcr = (cust_div >> 16) & OXSEMI_TORNADO_TCR_MASK;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1139 cpr = (cust_div >> 20) & OXSEMI_TORNADO_CPR_MASK;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1140 if (cpr < OXSEMI_TORNADO_CPR_MIN)
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1141 cpr = OXSEMI_TORNADO_CPR_DEF;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1142 } else {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1143 best_squot = quot_scale;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1144 for (i = 0; i < ARRAY_SIZE(p); i++) {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1145 unsigned int spre;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1146 unsigned int srem;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1147 u8 cp;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1148 u8 tc;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1149
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1150 tc = p[i][0];
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1151 cp = p[i][1];
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1152 spre = tc * cp;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1153
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1154 srem = sdiv % spre;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1155 if (srem > spre / 2)
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1156 srem = spre - srem;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1157 squot = (srem * quot_scale + spre / 2) / spre;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1158
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1159 if (srem == 0) {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1160 tcr = tc;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1161 cpr = cp;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1162 quot = sdiv / spre;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1163 break;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1164 } else if (squot < best_squot) {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1165 best_squot = squot;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1166 tcr = tc;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1167 cpr = cp;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1168 quot = (sdiv + spre / 2) / spre;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1169 }
No else path.
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1170 }
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 @1171 while (tcr <= (OXSEMI_TORNADO_TCR_MASK + 1) >> 1 &&
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 @1172 quot % 2 == 0) {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1173 quot >>= 1;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1174 tcr <<= 1;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1175 }
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1176 while (quot > UART_DIV_MAX) {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1177 if (tcr <= (OXSEMI_TORNADO_TCR_MASK + 1) >> 1) {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1178 quot >>= 1;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1179 tcr <<= 1;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 @1180 } else if (cpr <= OXSEMI_TORNADO_CPR_MASK >> 1) {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1181 quot >>= 1;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1182 cpr <<= 1;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1183 } else {
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1184 quot = quot * cpr / OXSEMI_TORNADO_CPR_MASK;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1185 cpr = OXSEMI_TORNADO_CPR_MASK;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1186 }
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1187 }
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1188 }
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1189
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1190 *frac = (cpr << 8) | (tcr & OXSEMI_TORNADO_TCR_MASK);
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1191 return quot;
5a389fe2b5e750 Maciej W. Rozycki 2022-02-12 1192 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
next prev parent reply other threads:[~2022-02-17 9:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-12 8:41 [PATCH v3 0/2] serial: 8250: Fixes for Oxford Semiconductor 950 UARTs Maciej W. Rozycki
2022-02-12 8:41 ` [PATCH v3 1/2] serial: 8250: Fold EndRun device support into OxSemi Tornado code Maciej W. Rozycki
2022-02-12 8:41 ` [PATCH v3 2/2] serial: 8250: Add proper clock handling for OxSemi PCIe devices Maciej W. Rozycki
2022-02-12 14:36 ` Andy Shevchenko
2022-02-17 9:23 ` Dan Carpenter [this message]
2022-02-17 12:05 ` Maciej W. Rozycki
2022-02-17 13:23 ` Dan Carpenter
2022-02-21 15:56 ` Maciej W. Rozycki
2022-03-01 20:52 ` [PING][PATCH v3 0/2] serial: 8250: Fixes for Oxford Semiconductor 950 UARTs Maciej W. Rozycki
2022-03-18 12:10 ` Greg Kroah-Hartman
2022-03-31 7:12 ` Maciej W. Rozycki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=202202130027.ZKBCgtm5-lkp@intel.com \
--to=dan.carpenter@oracle.com \
--cc=andy.shevchenko@gmail.com \
--cc=gregkh@linuxfoundation.org \
--cc=info@endruntechnologies.com \
--cc=jirislaby@kernel.org \
--cc=kbuild-all@lists.01.org \
--cc=kbuild@lists.01.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=lkp@intel.com \
--cc=macro@orcam.me.uk \
--cc=mkorreng@endruntechnologies.com \
--cc=mskoog@endruntechnologies.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).