From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 695A7C433F5 for ; Thu, 17 Feb 2022 07:58:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236937AbiBQH6c (ORCPT ); Thu, 17 Feb 2022 02:58:32 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:47474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236863AbiBQH63 (ORCPT ); Thu, 17 Feb 2022 02:58:29 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 492AD22496F; Wed, 16 Feb 2022 23:58:10 -0800 (PST) X-UUID: b786158083a14590966032b49f355042-20220217 X-UUID: b786158083a14590966032b49f355042-20220217 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 854081908; Thu, 17 Feb 2022 15:58:08 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Thu, 17 Feb 2022 15:58:06 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 17 Feb 2022 15:58:05 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Hans Verkuil , "Tzung-Bi Shih" , AngeloGioacchino Del Regno , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: George Sun , Xiaoyong Lu , Hsin-Yi Wang , Fritz Koenig , Dafna Hirschfeld , Benjamin Gaignard , Daniel Vetter , dri-devel , Irui Wang , Steve Cho , , , , , , , Subject: [PATCH v3, 1/7] dt-bindings: media: mtk-vcodec: Adds decoder dt-bindings for lat soc Date: Thu, 17 Feb 2022 15:57:52 +0800 Message-ID: <20220217075758.11369-2-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220217075758.11369-1-yunfei.dong@mediatek.com> References: <20220217075758.11369-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Adds decoder dt-bindings for compatible "mediatek,mtk-vcodec-lat-soc". Signed-off-by: Yunfei Dong --- .../media/mediatek,vcodec-subdev-decoder.yaml | 51 +++++++++++++------ 1 file changed, 35 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index 6415c9f29130..c263e762a906 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -17,20 +17,20 @@ description: | About the Decoder Hardware Block Diagram, please check below: - +---------------------------------+------------------------------------+ - | | | - | input -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output | - | || | || | - +------------||-------------------+---------------------||-------------+ - lat workqueue | core workqueue - -------------||-----------------------------------------||------------------ - || || - \/ <----------------HW index-------------->\/ - +------------------------------------------------------+ - | enable/disable | - | clk power irq iommu | - | (lat/lat soc/core0/core1) | - +------------------------------------------------------+ + +------------------------------------------------+-------------------------------------+ + | | | + | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output | + | || || | || | + +------------||-------------||-------------------+---------------------||--------------+ + || lat || | core workqueue + -------------||-------------||-------------------|---------------------||--------------- + ||<------------||----------------HW index---------------->|| + \/ \/ \/ + +-------------------------------------------------------------+ + | enable/disable | + | clk power irq iommu | + | (lat/lat soc/core0/core1) | + +-------------------------------------------------------------+ As above, there are parent and child devices, child mean each hardware. The child device controls the information of each hardware independent which include clk/power/irq. @@ -45,6 +45,13 @@ description: | For the smi common may not the same for each hardware, can't combine all hardware in one node, or leading to iommu fault when access dram data. + Lat soc is a hardware which is releated with some larb(local arbiter) ports. For mt8195 + platform, there are some ports like RDMA, UFO in lat soc larb, need to enable its power and + clock when lat start to work, don't have interrupt. + + mt8195: lat soc HW + lat HW + core HW + mt8192: lat HW + core HW + properties: compatible: enum: @@ -88,7 +95,9 @@ patternProperties: properties: compatible: - const: mediatek,mtk-vcodec-lat + enum: + - mediatek,mtk-vcodec-lat + - mediatek,mtk-vcodec-lat-soc reg: maxItems: 1 @@ -126,7 +135,6 @@ patternProperties: required: - compatible - reg - - interrupts - iommus - clocks - clock-names @@ -197,6 +205,17 @@ required: - dma-ranges - ranges +if: + properties: + compatible: + contains: + enum: + - mediatek,mtk-vcodec-lat + +then: + required: + - interrupts + additionalProperties: false examples: -- 2.25.1