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From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
To: broonie@kernel.org
Cc: lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com,
	pierre-louis.bossart@linux.intel.com,
	alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
	quic_srivasam@quicinc.com,
	Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Subject: [PATCH 10/10] ASoC: codecs: rx-macro: setup soundwire clks correctly
Date: Mon, 21 Feb 2022 13:10:37 +0000	[thread overview]
Message-ID: <20220221131037.8809-11-srinivas.kandagatla@linaro.org> (raw)
In-Reply-To: <20220221131037.8809-1-srinivas.kandagatla@linaro.org>

For SoundWire Frame sync to be generated correctly we need both MCLK
and MCLKx2 (npl). Without pm runtime enabled these two clocks will remain on,
however after adding pm runtime support its possible that NPl clock could be
turned off even when SoundWire controller is active.

Fix this by enabling mclk and npl clk when SoundWire clks are enabled.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 sound/soc/codecs/lpass-rx-macro.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c
index fb5d4bb8bd8b..9ce83cff3e1b 100644
--- a/sound/soc/codecs/lpass-rx-macro.c
+++ b/sound/soc/codecs/lpass-rx-macro.c
@@ -3428,6 +3428,7 @@ static int swclk_gate_enable(struct clk_hw *hw)
 {
 	struct rx_macro *rx = to_rx_macro(hw);
 
+	clk_prepare_enable(rx->clks[2].clk);
 	rx_macro_mclk_enable(rx, true);
 	if (rx->reset_swr)
 		regmap_update_bits(rx->regmap, CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
@@ -3453,6 +3454,7 @@ static void swclk_gate_disable(struct clk_hw *hw)
 			   CDC_RX_SWR_CLK_EN_MASK, 0);
 
 	rx_macro_mclk_enable(rx, false);
+	clk_disable_unprepare(rx->clks[2].clk);
 }
 
 static int swclk_gate_is_enabled(struct clk_hw *hw)
@@ -3490,7 +3492,7 @@ static struct clk *rx_macro_register_mclk_output(struct rx_macro *rx)
 	struct clk_init_data init;
 	int ret;
 
-	parent_clk_name = __clk_get_name(rx->clks[2].clk);
+	parent_clk_name = __clk_get_name(rx->clks[3].clk);
 
 	init.name = clk_name;
 	init.ops = &swclk_gate_ops;
-- 
2.21.0


      parent reply	other threads:[~2022-02-21 13:11 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-21 13:10 [PATCH 00/10] ASoC: codec: add pm runtime support for Qualcomm codecs Srinivas Kandagatla
2022-02-21 13:10 ` [PATCH 01/10] ASoC: codecs: va-macro: add runtime pm support Srinivas Kandagatla
2022-02-21 15:24   ` Mark Brown
2022-02-21 15:27     ` Srinivas Kandagatla
2022-02-21 13:10 ` [PATCH 02/10] ASoC: codecs: wsa-macro: " Srinivas Kandagatla
2022-02-21 13:10 ` [PATCH 03/10] ASoC: codecs: rx-macro: " Srinivas Kandagatla
2022-02-21 13:10 ` [PATCH 04/10] ASoC: codecs: tx-macro: " Srinivas Kandagatla
2022-02-21 13:10 ` [PATCH 05/10] ASoC: codecs: wsa881x: " Srinivas Kandagatla
2022-02-22 19:53   ` Pierre-Louis Bossart
2022-02-21 13:10 ` [PATCH 06/10] ASoC: codecs: wcd938x: add simple clk stop support Srinivas Kandagatla
2022-02-21 13:10 ` [PATCH 07/10] ASoC: codecs: wcd-mbhc: add runtime pm support Srinivas Kandagatla
2022-02-21 13:10 ` [PATCH 08/10] ASoC: codecs: wsa-macro: setup soundwire clks correctly Srinivas Kandagatla
2022-02-21 13:10 ` [PATCH 09/10] ASoC: codecs: tx-macro: " Srinivas Kandagatla
2022-02-21 15:38   ` Mark Brown
2022-02-21 16:11     ` Srinivas Kandagatla
2022-02-21 16:48       ` Mark Brown
2022-02-22 12:08         ` Srinivas Kandagatla
2022-02-21 13:10 ` Srinivas Kandagatla [this message]

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