From: Ben Chuang <benchuanggli@gmail.com>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org
Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
greg.tu@genesyslogic.com.tw, ben.chuang@genesyslogic.com.tw,
SeanHY.Chen@genesyslogic.com.tw,
Ben Chuang <benchuanggli@gmail.com>,
Kevin Chang <kevin.chang@lcfuturecenter.com>
Subject: [PATCH] mmc: sdhci-pci-gli: Add runtime PM for GL9763E
Date: Fri, 25 Feb 2022 20:55:53 +0800 [thread overview]
Message-ID: <20220225125553.1185108-2-benchuanggli@gmail.com> (raw)
In-Reply-To: <20220225125553.1185108-1-benchuanggli@gmail.com>
From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Add runtime PM for GL9763E and disable PLL in runtime suspend. So power
gated of upstream port can be enabled.
Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Tested-by: Kevin Chang <kevin.chang@lcfuturecenter.com>
---
drivers/mmc/host/sdhci-pci-gli.c | 54 ++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index 97035d77c18c..cf99b6af792d 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -873,6 +873,55 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
}
+#ifdef CONFIG_PM
+static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)
+{
+ struct sdhci_pci_slot *slot = chip->slots[0];
+ struct sdhci_host *host = slot->host;
+ u16 clock;
+
+ clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+ clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN);
+ sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
+
+ return 0;
+}
+
+static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip)
+{
+ struct sdhci_pci_slot *slot = chip->slots[0];
+ struct sdhci_host *host = slot->host;
+ ktime_t timeout;
+ u16 clock;
+
+ clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+
+ clock |= SDHCI_CLOCK_PLL_EN;
+ clock &= ~SDHCI_CLOCK_INT_STABLE;
+ sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
+
+ timeout = ktime_add_ms(ktime_get(), 150);
+ while (1) {
+ bool timedout = ktime_after(ktime_get(), timeout);
+
+ clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+ if (clock & SDHCI_CLOCK_INT_STABLE)
+ break;
+ if (timedout) {
+ pr_err("%s: PLL clock never stabilised.\n",
+ mmc_hostname(host->mmc));
+ sdhci_dumpregs(host);
+ break;
+ }
+ udelay(10);
+ }
+ clock |= SDHCI_CLOCK_CARD_EN;
+ sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
+
+ return 0;
+}
+#endif
+
static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
{
struct pci_dev *pdev = slot->chip->pdev;
@@ -982,6 +1031,11 @@ const struct sdhci_pci_fixes sdhci_gl9763e = {
#ifdef CONFIG_PM_SLEEP
.resume = sdhci_cqhci_gli_resume,
.suspend = sdhci_cqhci_gli_suspend,
+#endif
+#ifdef CONFIG_PM
+ .runtime_suspend = gl9763e_runtime_suspend,
+ .runtime_resume = gl9763e_runtime_resume,
+ .allow_runtime_pm = true,
#endif
.add_host = gl9763e_add_host,
};
--
2.35.1
next prev parent reply other threads:[~2022-02-25 12:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-25 12:55 [PATCH] mmc: sdhci-pci-gli: Add runtime PM for GL9763E Ben Chuang
2022-02-25 12:55 ` Ben Chuang [this message]
2022-02-28 17:03 ` Ulf Hansson
2022-03-01 10:05 ` Adrian Hunter
2022-03-02 2:10 ` Ben Chuang
2022-03-02 10:03 ` Ulf Hansson
[not found] ` <CACT4zj_6k=0gNRw=EFHR=9-7fWJ=bT4Q1VsPMWrkVPftjLb=Hw@mail.gmail.com>
2022-03-02 12:02 ` Ben Chuang
2022-03-02 16:31 ` Ulf Hansson
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