From: "David E. Box" <david.e.box@linux.intel.com>
To: nirmal.patel@linux.intel.com, jonathan.derrick@linux.dev,
lorenzo.pieralisi@arm.com, hch@infradead.org, kw@linux.com,
robh@kernel.org, bhelgaas@google.com,
david.e.box@linux.intel.com, michael.a.bottini@linux.intel.com,
rafael@kernel.org, me@adhityamohan.in
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH V6 0/3] PCI: vmd: Enable PCIe ASPM and LTR
Date: Mon, 28 Feb 2022 20:19:40 -0800 [thread overview]
Message-ID: <20220301041943.2935892-1-david.e.box@linux.intel.com> (raw)
This series adds support for enabling PCIe ASPM and for setting PCIe LTR
values on devices on root ports reserved by VMD. Configuration of these
capabilities is usually done by BIOS. But for VMD ports these capabilities
will not be configured because those ports are not visible to BIOS. For
future products, post Alder Lake, the hardware team has agreed to do this
enabling in BIOS. But this will not apply to current products, so this
work around is provided for them. Without this, laptops running in VMD mode
will not be able to power gate roots ports, resulting in higher power
consumption.
Since V4 we have more information from the BIOS team as to why BIOS
needs to program device LTRs. This is something that should be done by
devices, but there are many that don't provide LTR values causing them
to block SoC level power management. BIOS sets an initial default LTR to
account for such devices. This SoC specific value is the maximum latency
required to allow the SoC to enter the deepest power state.
David E. Box (2):
PCI: vmd: Add vmd_device_data
PCI: vmd: Configure PCIe ASPM and LTR
Michael Bottini (1):
PCI/ASPM: Add ASPM BIOS override function
drivers/pci/controller/vmd.c | 134 ++++++++++++++++++++++++++++-------
drivers/pci/pcie/aspm.c | 54 ++++++++++++++
include/linux/pci.h | 7 ++
3 files changed, 169 insertions(+), 26 deletions(-)
base-commit: 754e0b0e35608ed5206d6a67a791563c631cec07
--
2.25.1
next reply other threads:[~2022-03-01 4:19 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-01 4:19 David E. Box [this message]
2022-03-01 4:19 ` [PATCH V6 1/3] PCI/ASPM: Add pci_enable_default_link_state() David E. Box
2022-03-01 8:13 ` Christoph Hellwig
2022-03-01 13:31 ` David E. Box
2022-03-01 13:38 ` Christoph Hellwig
2022-08-26 9:16 ` Lorenzo Pieralisi
2022-08-26 17:01 ` Bjorn Helgaas
2022-03-01 4:19 ` [PATCH V6 2/3] PCI: vmd: Add vmd_device_data David E. Box
2022-08-26 9:15 ` Lorenzo Pieralisi
2022-03-01 4:19 ` [PATCH V6 3/3] PCI: vmd: Configure PCIe ASPM and LTR David E. Box
2022-08-26 17:01 ` Bjorn Helgaas
2022-09-14 20:59 ` David E. Box
2022-03-01 19:19 ` [PATCH V6 0/3] PCI: vmd: Enable " Jonathan Derrick
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220301041943.2935892-1-david.e.box@linux.intel.com \
--to=david.e.box@linux.intel.com \
--cc=bhelgaas@google.com \
--cc=hch@infradead.org \
--cc=jonathan.derrick@linux.dev \
--cc=kw@linux.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=me@adhityamohan.in \
--cc=michael.a.bottini@linux.intel.com \
--cc=nirmal.patel@linux.intel.com \
--cc=rafael@kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).