[PATCH 0/4] x86/platform/uv: UV Kernel support for UV5

[Mike Travis <mike.travis@hpe.com>]

    Remove obsolete scratch5 NMI handler
	Removes obsolete scratch5 NMI handler only used in UV1 and early UV2
	systems.

    Update NMI setup for UV5
	Update NMI handler to interface with UV5 hardware. This involves
	changing the EVENT_OCCURRED MMR used by the hardware and removes
	the check for the newer NMI function supported by UV BIOS.

    Update TSC sync check for UV5
	Update TSC to not check TSC sync state for uv5+ as it is not
	available.  Therefore it is assumed that TSC will always be in
	sync for multiple chassis and will pass the tests for the kernel
	to accept it as the clocksource.  To disable this check use the
	kernel start options tsc=reliable clocksource=tsc.

    Add gap hole end size
	Show value of gap end in kernel log which equates to number of
	physical address bits used by system.  The structure stores PA
	bits 56:26, for 64MB granularity, up to 64PB max size.


Mike Travis (4):
  x86/platform/uv: Remove Obsolete Scratch5 NMI handler
  x86/platform/uv: Update NMI Handler for UV5
  x86/platform/uv: Update TSC sync state for UV5
  x86/platform/uv: Add gap hole end size

 arch/x86/include/asm/uv/uv_hub.h   |  6 ------
 arch/x86/kernel/apic/x2apic_uv_x.c | 20 +++++++++++++++-----
 arch/x86/platform/uv/uv_nmi.c      | 27 ++++++++++++---------------
 3 files changed, 27 insertions(+), 26 deletions(-)

-- 
2.26.2