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Peter Anvin" , Russ Anderson , linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 1/4] x86/platform/uv: Remove Obsolete Scratch5 NMI handler Date: Mon, 7 Mar 2022 19:05:34 -0600 Message-Id: <20220308010537.70150-2-mike.travis@hpe.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20220308010537.70150-1-mike.travis@hpe.com> References: <20220308010537.70150-1-mike.travis@hpe.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: OMJDI3ASZF6Mmzu497SKdfDBPYnz7uEN X-Proofpoint-ORIG-GUID: OMJDI3ASZF6Mmzu497SKdfDBPYnz7uEN X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-07_12,2022-03-04_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 spamscore=0 suspectscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 mlxscore=0 malwarescore=0 priorityscore=1501 mlxlogscore=999 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2203080000 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Removes obsolete scratch5 NMI handler only used in UV1 and early UV2 systems. Signed-off-by: Mike Travis Reviewed-by: Steve Wahl --- arch/x86/include/asm/uv/uv_hub.h | 6 ------ arch/x86/platform/uv/uv_nmi.c | 5 +---- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h index d3e3197917be..958c18f94146 100644 --- a/arch/x86/include/asm/uv/uv_hub.h +++ b/arch/x86/include/asm/uv/uv_hub.h @@ -729,12 +729,6 @@ extern void uv_nmi_setup_hubless(void); #define UVH_TSC_SYNC_VALID 3 /* 0011 */ #define UVH_TSC_SYNC_UNKNOWN 0 /* 0000 */ -/* BMC sets a bit this MMR non-zero before sending an NMI */ -#define UVH_NMI_MMR UVH_BIOS_KERNEL_MMR -#define UVH_NMI_MMR_CLEAR UVH_BIOS_KERNEL_MMR_ALIAS -#define UVH_NMI_MMR_SHIFT 63 -#define UVH_NMI_MMR_TYPE "SCRATCH5" - struct uv_hub_nmi_s { raw_spinlock_t nmi_lock; atomic_t in_nmi; /* flag this node in UV NMI IRQ */ diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c index 1e9ff28bc2e0..926a4e006e5a 100644 --- a/arch/x86/platform/uv/uv_nmi.c +++ b/arch/x86/platform/uv/uv_nmi.c @@ -280,10 +280,7 @@ static void uv_nmi_setup_mmrs(void) nmi_mmr_pending = 1UL << uvh_nmi_mmrx_shift; pr_info("UV: SMI NMI support: %s\n", uvh_nmi_mmrx_type); } else { - nmi_mmr = UVH_NMI_MMR; - nmi_mmr_clear = UVH_NMI_MMR_CLEAR; - nmi_mmr_pending = 1UL << UVH_NMI_MMR_SHIFT; - pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMR_TYPE); + pr_warn("UV: NMI handler not present or not supported\n"); } } -- 2.26.2