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From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	stable@vger.kernel.org, James Morse <james.morse@arm.com>
Subject: [PATCH 4.9 39/43] KVM: arm64: Add templates for BHB mitigation sequences
Date: Wed,  6 Apr 2022 20:26:48 +0200	[thread overview]
Message-ID: <20220406182437.814721153@linuxfoundation.org> (raw)
In-Reply-To: <20220406182436.675069715@linuxfoundation.org>

From: James Morse <james.morse@arm.com>

KVM writes the Spectre-v2 mitigation template at the beginning of each
vector when a CPU requires a specific sequence to run.

Because the template is copied, it can not be modified by the alternatives
at runtime. As the KVM template code is intertwined with the bp-hardening
callbacks, all templates must have a bp-hardening callback.

Add templates for calling ARCH_WORKAROUND_3 and one for each value of K
in the brancy-loop. Identify these sequences by a new parameter
template_start, and add a copy of install_bp_hardening_cb() that is able to
install them.

Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/include/asm/cpucaps.h |    3 +
 arch/arm64/include/asm/kvm_mmu.h |    2 -
 arch/arm64/include/asm/mmu.h     |    6 +++
 arch/arm64/kernel/bpi.S          |   50 +++++++++++++++++++++++++++
 arch/arm64/kernel/cpu_errata.c   |   71 +++++++++++++++++++++++++++++++++++++--
 5 files changed, 128 insertions(+), 4 deletions(-)

--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -39,7 +39,8 @@
 #define ARM64_SSBD				18
 #define ARM64_MISMATCHED_CACHE_TYPE		19
 #define ARM64_WORKAROUND_1188873		20
+#define ARM64_SPECTRE_BHB			21
 
-#define ARM64_NCAPS				21
+#define ARM64_NCAPS				22
 
 #endif /* __ASM_CPUCAPS_H */
--- a/arch/arm64/include/asm/kvm_mmu.h
+++ b/arch/arm64/include/asm/kvm_mmu.h
@@ -362,7 +362,7 @@ static inline void *kvm_get_hyp_vector(v
 	struct bp_hardening_data *data = arm64_get_bp_hardening_data();
 	void *vect = kvm_ksym_ref(__kvm_hyp_vector);
 
-	if (data->fn) {
+	if (data->template_start) {
 		vect = __bp_harden_hyp_vecs_start +
 		       data->hyp_vectors_slot * SZ_2K;
 
--- a/arch/arm64/include/asm/mmu.h
+++ b/arch/arm64/include/asm/mmu.h
@@ -45,6 +45,12 @@ typedef void (*bp_hardening_cb_t)(void);
 struct bp_hardening_data {
 	int			hyp_vectors_slot;
 	bp_hardening_cb_t	fn;
+
+	/*
+	 * template_start is only used by the BHB mitigation to identify the
+	 * hyp_vectors_slot sequence.
+	 */
+	const char *template_start;
 };
 
 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
--- a/arch/arm64/kernel/bpi.S
+++ b/arch/arm64/kernel/bpi.S
@@ -73,3 +73,53 @@ ENTRY(__smccc_workaround_1_smc_end)
 ENTRY(__smccc_workaround_1_hvc_start)
 	smccc_workaround_1	hvc
 ENTRY(__smccc_workaround_1_hvc_end)
+
+ENTRY(__smccc_workaround_3_smc_start)
+	sub     sp, sp, #(8 * 4)
+	stp     x2, x3, [sp, #(8 * 0)]
+	stp     x0, x1, [sp, #(8 * 2)]
+	mov     w0, #ARM_SMCCC_ARCH_WORKAROUND_3
+	smc     #0
+	ldp     x2, x3, [sp, #(8 * 0)]
+	ldp     x0, x1, [sp, #(8 * 2)]
+	add     sp, sp, #(8 * 4)
+ENTRY(__smccc_workaround_3_smc_end)
+
+ENTRY(__spectre_bhb_loop_k8_start)
+	sub     sp, sp, #(8 * 2)
+	stp     x0, x1, [sp, #(8 * 0)]
+	mov     x0, #8
+2:	b       . + 4
+	subs    x0, x0, #1
+	b.ne    2b
+	dsb     nsh
+	isb
+	ldp     x0, x1, [sp, #(8 * 0)]
+	add     sp, sp, #(8 * 2)
+ENTRY(__spectre_bhb_loop_k8_end)
+
+ENTRY(__spectre_bhb_loop_k24_start)
+	sub     sp, sp, #(8 * 2)
+	stp     x0, x1, [sp, #(8 * 0)]
+	mov     x0, #24
+2:	b       . + 4
+	subs    x0, x0, #1
+	b.ne    2b
+	dsb     nsh
+	isb
+	ldp     x0, x1, [sp, #(8 * 0)]
+	add     sp, sp, #(8 * 2)
+ENTRY(__spectre_bhb_loop_k24_end)
+
+ENTRY(__spectre_bhb_loop_k32_start)
+	sub     sp, sp, #(8 * 2)
+	stp     x0, x1, [sp, #(8 * 0)]
+	mov     x0, #32
+2:	b       . + 4
+	subs    x0, x0, #1
+	b.ne    2b
+	dsb     nsh
+	isb
+	ldp     x0, x1, [sp, #(8 * 0)]
+	add     sp, sp, #(8 * 2)
+ENTRY(__spectre_bhb_loop_k32_end)
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -74,6 +74,14 @@ extern char __smccc_workaround_1_smc_sta
 extern char __smccc_workaround_1_smc_end[];
 extern char __smccc_workaround_1_hvc_start[];
 extern char __smccc_workaround_1_hvc_end[];
+extern char __smccc_workaround_3_smc_start[];
+extern char __smccc_workaround_3_smc_end[];
+extern char __spectre_bhb_loop_k8_start[];
+extern char __spectre_bhb_loop_k8_end[];
+extern char __spectre_bhb_loop_k24_start[];
+extern char __spectre_bhb_loop_k24_end[];
+extern char __spectre_bhb_loop_k32_start[];
+extern char __spectre_bhb_loop_k32_end[];
 
 static void __copy_hyp_vect_bpi(int slot, const char *hyp_vecs_start,
 				const char *hyp_vecs_end)
@@ -87,12 +95,14 @@ static void __copy_hyp_vect_bpi(int slot
 	flush_icache_range((uintptr_t)dst, (uintptr_t)dst + SZ_2K);
 }
 
+static DEFINE_SPINLOCK(bp_lock);
+static int last_slot = -1;
+
 static void __install_bp_hardening_cb(bp_hardening_cb_t fn,
 				      const char *hyp_vecs_start,
 				      const char *hyp_vecs_end)
 {
-	static int last_slot = -1;
-	static DEFINE_SPINLOCK(bp_lock);
+
 	int cpu, slot = -1;
 
 	spin_lock(&bp_lock);
@@ -113,6 +123,7 @@ static void __install_bp_hardening_cb(bp
 
 	__this_cpu_write(bp_hardening_data.hyp_vectors_slot, slot);
 	__this_cpu_write(bp_hardening_data.fn, fn);
+	__this_cpu_write(bp_hardening_data.template_start, hyp_vecs_start);
 	spin_unlock(&bp_lock);
 }
 #else
@@ -544,3 +555,59 @@ const struct arm64_cpu_capabilities arm6
 	{
 	}
 };
+
+#ifdef CONFIG_KVM
+static const char *kvm_bhb_get_vecs_end(const char *start)
+{
+	if (start == __smccc_workaround_3_smc_start)
+		return __smccc_workaround_3_smc_end;
+	else if (start == __spectre_bhb_loop_k8_start)
+		return __spectre_bhb_loop_k8_end;
+	else if (start == __spectre_bhb_loop_k24_start)
+		return __spectre_bhb_loop_k24_end;
+	else if (start == __spectre_bhb_loop_k32_start)
+		return __spectre_bhb_loop_k32_end;
+
+	return NULL;
+}
+
+void kvm_setup_bhb_slot(const char *hyp_vecs_start)
+{
+	int cpu, slot = -1;
+	const char *hyp_vecs_end;
+
+	if (!IS_ENABLED(CONFIG_KVM) || !is_hyp_mode_available())
+		return;
+
+	hyp_vecs_end = kvm_bhb_get_vecs_end(hyp_vecs_start);
+	if (WARN_ON_ONCE(!hyp_vecs_start || !hyp_vecs_end))
+		return;
+
+	spin_lock(&bp_lock);
+	for_each_possible_cpu(cpu) {
+		if (per_cpu(bp_hardening_data.template_start, cpu) == hyp_vecs_start) {
+			slot = per_cpu(bp_hardening_data.hyp_vectors_slot, cpu);
+			break;
+		}
+	}
+
+	if (slot == -1) {
+		last_slot++;
+		BUG_ON(((__bp_harden_hyp_vecs_end - __bp_harden_hyp_vecs_start)
+			/ SZ_2K) <= last_slot);
+		slot = last_slot;
+		__copy_hyp_vect_bpi(slot, hyp_vecs_start, hyp_vecs_end);
+	}
+
+	__this_cpu_write(bp_hardening_data.hyp_vectors_slot, slot);
+	__this_cpu_write(bp_hardening_data.template_start, hyp_vecs_start);
+	spin_unlock(&bp_lock);
+}
+#else
+#define __smccc_workaround_3_smc_start NULL
+#define __spectre_bhb_loop_k8_start NULL
+#define __spectre_bhb_loop_k24_start NULL
+#define __spectre_bhb_loop_k32_start NULL
+
+void kvm_setup_bhb_slot(const char *hyp_vecs_start) { };
+#endif



  parent reply	other threads:[~2022-04-06 20:04 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-06 18:26 [PATCH 4.9 00/43] 4.9.310-rc1 review Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 01/43] arm64: errata: Provide macro for major and minor cpu revisions Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 02/43] arm64: Remove useless UAO IPI and describe how this gets enabled Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 03/43] arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35 Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 04/43] arm64: capabilities: Update prototype for enable call back Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 05/43] arm64: capabilities: Move errata work around check on boot CPU Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 06/43] arm64: capabilities: Move errata processing code Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 07/43] arm64: capabilities: Prepare for fine grained capabilities Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 08/43] arm64: capabilities: Add flags to handle the conflicts on late CPU Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 09/43] arm64: capabilities: Clean up midr range helpers Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 10/43] arm64: Add helpers for checking CPU MIDR against a range Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 11/43] arm64: capabilities: Add support for checks based on a list of MIDRs Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 12/43] clocksource/drivers/arm_arch_timer: Remove fsl-a008585 parameter Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 13/43] clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructure Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 14/43] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 15/43] arm64: arch_timer: Add erratum handler for CPU-specific capability Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 16/43] arm64: arch_timer: Add workaround for ARM erratum 1188873 Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 17/43] arm64: arch_timer: avoid unused function warning Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 18/43] arm64: Add silicon-errata.txt entry for ARM erratum 1188873 Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 19/43] arm64: Make ARM64_ERRATUM_1188873 depend on COMPAT Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 20/43] arm64: Add part number for Neoverse N1 Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 21/43] arm64: Add part number for Arm Cortex-A77 Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 22/43] arm64: Add Neoverse-N2, Cortex-A710 CPU part definition Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 23/43] arm64: Add Cortex-X2 " Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 24/43] arm64: Add helper to decode register from instruction Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 25/43] arm64: entry.S: Add ventry overflow sanity checks Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 26/43] arm64: entry: Make the trampoline cleanup optional Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 27/43] arm64: entry: Free up another register on kptis tramp_exit path Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 28/43] arm64: entry: Move the trampoline data page before the text page Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 29/43] arm64: entry: Allow tramp_alias to access symbols after the 4K boundary Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 30/43] arm64: entry: Dont assume tramp_vectors is the start of the vectors Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 31/43] arm64: entry: Move trampoline macros out of ifdefd section Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 32/43] arm64: entry: Make the kpti trampolines kpti sequence optional Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 33/43] arm64: entry: Allow the trampoline text to occupy multiple pages Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 34/43] arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 35/43] arm64: Move arm64_update_smccc_conduit() out of SSBD ifdef Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 36/43] arm64: entry: Add vectors that have the bhb mitigation sequences Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 37/43] arm64: entry: Add macro for reading symbol addresses from the trampoline Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 38/43] arm64: Add percpu vectors for EL1 Greg Kroah-Hartman
2022-04-06 18:26 ` Greg Kroah-Hartman [this message]
2022-04-06 18:26 ` [PATCH 4.9 40/43] arm64: Mitigate spectre style branch history side channels Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 41/43] KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 42/43] arm64: add ID_AA64ISAR2_EL1 sys register Greg Kroah-Hartman
2022-04-06 18:26 ` [PATCH 4.9 43/43] arm64: Use the clearbhb instruction in mitigations Greg Kroah-Hartman
2022-04-06 20:57 ` [PATCH 4.9 00/43] 4.9.310-rc1 review Florian Fainelli
2022-04-06 21:55 ` Pavel Machek
2022-04-06 22:51 ` Shuah Khan
2022-04-07  9:32 ` Guenter Roeck
2022-04-07 10:23   ` Greg Kroah-Hartman
2022-04-07 17:20     ` James Morse
2022-04-12  5:51       ` Greg Kroah-Hartman
2022-04-07 11:20 ` Naresh Kamboju
2022-04-07 11:28 ` Naresh Kamboju

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