From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 895A1C433EF for ; Thu, 14 Apr 2022 12:27:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243189AbiDNM30 (ORCPT ); Thu, 14 Apr 2022 08:29:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243302AbiDNM1u (ORCPT ); Thu, 14 Apr 2022 08:27:50 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75FC32FFD9; Thu, 14 Apr 2022 05:25:01 -0700 (PDT) Received: (Authenticated sender: clement.leger@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 7530340016; Thu, 14 Apr 2022 12:24:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649939100; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=AVV9dorZosBq4Eyh1b2aaNZR5/BtAkbVcbEdxKlsk0U=; b=ZXZCFEZJZFOPGa3DQdbWkzZq1JfbrYDZrvBmdIbOvzc+GzBoh25nFw0FRAW/fgRxux76iR +HuXcfSuhHjOCJPhJ8T5Bt0nHCRmw8PG49EYPdGX1C1hYxo9B4D2WNEP6fnWJwOceuwujl vhkMjQ9SuruWqiX6CRrVl2JO4jPFcLtVhwO5y4teRCHr3o7V/P0B6CL4ImIzR6PJVRUeoT 3tpc2xjgxsaLjeg3N/A6LhD5DoB9dh+18jnzSRotcLGSrBjY5dt0lib8HiRj6PRdkY2FGM zS+t6CyrzBwHSs8Kg/lN1R8fydMT7MQXe+IHwxCQwX9lFfpdnzrYm1ShMysM1Q== From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Heiner Kallweit , Russell King Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Thomas Petazzoni , Herve Codina , =?UTF-8?q?Miqu=C3=A8l=20Raynal?= , Milan Stevanovic , Jimmy Lalande , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org Subject: [PATCH net-next 11/12] ARM: dts: r9a06g032: describe switch Date: Thu, 14 Apr 2022 14:22:49 +0200 Message-Id: <20220414122250.158113-12-clement.leger@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220414122250.158113-1-clement.leger@bootlin.com> References: <20220414122250.158113-1-clement.leger@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add description of the switch that is present on the RZ/N1 SoC. Signed-off-by: Clément Léger --- arch/arm/boot/dts/r9a06g032.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 9be55957b8e5..c04b382a20f0 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -250,6 +250,17 @@ mii_conv4: mii-conv@4 { }; }; + switch: switch@44050000 { + compatible = "renesas,rzn1-a5psw"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x44050000 0x10000>; + clocks = <&sysctrl R9A06G032_HCLK_SWITCH>, + <&sysctrl R9A06G032_CLK_SWITCH>; + clock-names = "hclk_switch", "clk_switch"; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; -- 2.34.1